- 08 Apr, 2019 2 commits
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YueHaibing authored
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c: In function 'vmw_cmdbuf_work_func': drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c:514:7: warning: variable 'restart' set but not used [-Wunused-but-set-variable] It not used any more after commit dc366364 ("drm/vmwgfx: Fix multiple command buffer context use") Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Reviewed-by:
Deepak Rawat <drawat@vmware.com> Signed-off-by:
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Thomas Hellstrom authored
Currently we flag resources as dirty (GPU contents not yet read back to the backing MOB) whenever they have been part of a command stream. Obviously many resources can't be dirty and others can only be dirty when written to by the GPU. That is when they are either bound to the context as render-targets, depth-stencil, copy / clear destinations and stream-output targets, or similarly when there are corresponding views into them. So mark resources dirty only in these special cases. Context- and cotable resources are always marked dirty when referenced. This is important for upcoming emulated coherent memory, since we can avoid issuing automatic readbacks to non-dirty resources when the CPU tries to access part of the backing MOB. Testing: Unigine Heaven with max GPU memory set to 256MB resulting in heavy resource thrashing. --- v2: Addressed review comments by Deepak Rawat. v3: Added some documentation Signed-off-by:
Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by:
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- 05 Apr, 2019 1 commit
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git://anongit.freedesktop.org/drm/drm-miscDave Airlie authored
drm-misc-next for 5.2: UAPI Changes: -syncobj: Add TIMELINE_WAIT|QUERY|TRANSFER|TIMELINE_SIGNAL ioctls (Chunming) -Clarify that 1.0 can be represented by drm_color_lut (Daniel) Cross-subsystem Changes: -dt-bindings: Add binding for rk3066 hdmi (Johan) -dt-bindings: Add binding for Feiyang FY07024DI26A30-D panel (Jagan) -dt-bindings: Add Rocktech vendor prefix and jh057n00900 panel bindings (Guido) -MAINTAINERS: Add lima and ASPEED entries (Joel & Qiang) Core Changes: -memory: use dma_alloc_coherent when mem encryption is active (Christian) -dma_buf: add support for a dma_fence chain (Christian) -shmem_gem: fix off-by-one bug in new shmem gem helpers (Dan) Driver Changes: -rockchip: Add support for rk3066 hdmi (Johan) -ASPEED: Add driver supporting ASPEED BMC display controller to drm (Joel) -lima: Add driver supporting Arm Mali4xx gpus to drm (Qiang) -vc4/v3d: Various cleanups and improved error handling (Eric) -panel: Add support for Feiyang FY07024DI26A30-D MIPI-DSI panel (Jagan) -panel: Add support for Rocktech jh057n00900 MIPI-DSI panel (Guido) Cc: Johan Jonker <jbx6244@gmail.com> Cc: Christian König <christian.koenig@amd.com> Cc: Chunming Zhou <david1.zhou@amd.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Eric Anholt <eric@anholt.net> Cc: Qiang Yu <yuq825@gmail.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Jagan Teki <jagan@amarulasolutions.com> Cc: Guido Günther <agx@sigxcpu.org> Cc: Joel Stanley <joel@jms.id.au> [airlied: fixed XA limit build breakage, Rodrigo also submitted the same patch, but I squashed it in the merge.] Signed-off-by:
Dave Airlie <airlied@redhat.com> From: Sean Paul <sean@poorly.run> Link: https://patchwork.freedesktop.org/patch/msgid/20190404201016.GA139524@art_vandelay
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- 04 Apr, 2019 3 commits
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Joel Stanley authored
This hardware is found inside ASPEED Baseboard Management Controller (BMC) system on chips. It is called the 'SOC Display Controller' or 'GFX'. Signed-off-by:
Joel Stanley <joel@jms.id.au> Acked-by:
Andrew Jeffery <andrew@aj.id.au> Link: https://patchwork.freedesktop.org/patch/msgid/20190403001909.31637-4-joel@jms.id.au
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Joel Stanley authored
This driver is for the ASPEED BMC SoC's GFX display hardware. This driver runs on the ARM based BMC systems, unlike the ast driver which runs on a host CPU and is is for a PCI graphics device. Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by:
Noralf Trønnes <noralf@tronnes.org> Reviewed-by:
Sam Ravnborg <sam@ravnborg.org> Link: https://patchwork.freedesktop.org/patch/msgid/20190403001909.31637-3-joel@jms.id.au
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Joel Stanley authored
This describes the ASPEED BMC SoC's display controller. Signed-off-by:
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- 03 Apr, 2019 19 commits
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Eric Anholt authored
One might want to use the VC4 display stack without using Mesa. Similar to the debugfs fixes for not having all of the possible display bits enabled, make sure you can't oops in vc4 if v3d isn't enabled. v2: Fix matching against other v3d variants (review by Paul), don't forget to set irq_enabled so that the vblank uapi works v3: Use -ENODEV instead of -EINVAL on Paul's suggestion. Signed-off-by:Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190401183559.3823-2-eric@anholt.netReviewed-by:
Paul Kocialkowski <paul.kocialkowski@bootlin.com>
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Eric Anholt authored
The global list of all debugfs entries for the driver was painful: the list couldn't see into the components' structs, so each component had its own debugs show function to find the component, then find the regset and dump it. The components also had to be careful to check that they were actually registered in vc4 before dereferencing themselves, in case they weren't probed on a particular platform. They routinely failed at that. Instead, we can have the components add their debugfs callbacks to a little list in vc4 to be registered at drm_dev_register() time, which gets vc4_debugfs.c out of the business of knowing the whole list of components. Thanks to this change, dsi0 (if it existed) would register its node. v2: Rebase on hvs_underrun addition. v3: whitespace fixup Signed-off-by:
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Yannick Fertré authored
The panel does not support clock frequency over 30.74 MHz. The clock rate has been reduced to 29.70 MHz & new timings have been computed to get a framerate of 50 fps. Signed-off-by:
Yannick Fertré <yannick.fertre@st.com> Reviewed-by:
Philippe Cornu <philippe.cornu@st.com> Tested-by:
Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/1553155646-13636-1-git-send-email-yannick.fertre@st.com
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Yannick Fertré authored
Do not print an error message if the regulator framework returns EPROBE_DEFER. Signed-off-by:
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Yannick Fertré authored
Do not print an error message if the regulator framework returns EPROBE_DEFER. Signed-off-by:
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Yannick Fertré authored
At the end of initialization, a delay is required by the panel. Without this delay, the panel could received a frame early & generate a crash of panel (black screen). Signed-off-by:
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Guido Günther authored
Support Rocktech jh057n00900 5.5" 720x1440 TFT LCD panel. It is a MIPI DSI video mode panel. The panel seems to use a Sitronix ST7703 look alike (most of the commands look similar to the ST7703's data sheet but use a different number of parameters). The initial version of the DSI init sequence (including sleeps) were provided by the vendor. Sleeps were reduced considerably though to speed up initialization. Signed-off-by:
Guido Günther <agx@sigxcpu.org> Reviewed-by:
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Guido Günther authored
The Rocktec jh057n00900 is a 5.5" MIPI DSI video mode panel with a 720x1440 resolution and a built in backlight. Signed-off-by:
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Guido Günther authored
Add ROCKTECH DISPLAYS LIMITED (https://rocktech.com.hk) LCD panel supplier. Signed-off-by:
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Guido Günther authored
Some examples were missing the unit names triggering Warning (unit_address_vs_reg): .../panel: node has a reg or ranges property, but no unit name warnings when used verbatim in DTs and running dtc with W=1. Signed-off-by:
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Jagan Teki authored
Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel. Add panel driver for it. Signed-off-by:
Jagan Teki <jagan@amarulasolutions.com> Reviewed-by:
Bhushan Shah <bshah@kde.org> Tested-by:
Merlijn Wajer <merlijn@wizzup.org> Signed-off-by:
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Jagan Teki authored
Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel. Add dt-bingings for it. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Daniel Vetter authored
Interpreting it as a 0.16 fixed point means we can't accurately represent 1.0. Which is one of the values we really should be able to represent. Since most (all?) luts have lower precision this will only affect rounding of 0xffff. Cc: Uma Shankar <uma.shankar@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: "Kumar, Kiran S" <kiran.s.kumar@intel.com> Cc: Kausal Malladi <kausalmalladi@gmail.com> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Rob Bradford <robert.bradford@intel.com> Cc: Daniel Stone <daniels@collabora.com> Cc: Stefan Schake <stschake@gmail.com> Cc: Eric Anholt <eric@anholt.net> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Leo Li <sunpeng.li@amd.com> Cc: amd-gfx@lists.freedesktop.org Cc: James (Qian) Wang <james.qian.wang@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Cc: CK Hu <ck.hu@mediatek.com> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: Yannick Fertre <yannick.fertre@st.com> Cc: Philippe Cornu <philippe.cornu@st.com> Cc: Benjamin Gaignard <benjamin.gaignard@linaro.org> Cc: Vincent Abriou <vincent.abriou@st.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by:
Liviu Dudau <liviu.dudau@arm.com> Acked-by:
Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Reviewed-by:
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190329092027.3430-1-daniel.vetter@ffwll.ch
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Noralf Trønnes authored
Hotplug can happen while drm_fbdev_generic_setup() is running so move drm_client_add() call after setup is done to avoid drm_fbdev_client_hotplug() running in two threads at the same time. Fixes: 9060d7f4 ("drm/fb-helper: Finish the generic fbdev emulation") Cc: stable@vger.kernel.org Reported-by:
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Noralf Trønnes authored
drm_dev_register() initializes internal clients like bootsplash as the last thing it does, so all setup needs to be done at this point. Fix by calling vc4_kms_load() before registering. Also check the error code returned from that function. Cc: Eric Anholt <eric@anholt.net> Signed-off-by:
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Noralf Trønnes authored
For each enabled crtc the functions sets dpms on all registered connectors. Limit this to only doing it once and on the connectors actually in use. Signed-off-by:
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Noralf Trønnes authored
The gamma_size variable has not been used since commit 4abe3520 ("drm/kms/fb: use slow work mechanism for normal hotplug also.") While in the area move a comment back to its code block. They got separated by commit d50ba256 ("drm/kms: start adding command line interface using fb."). Signed-off-by:
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git://linux-arm.org/linux-ldDave Airlie authored
This pull requests adds initial Mali D71 support into the Arm "komeda" DRM driver. The code has been reviewed at the end of last year, I just been too slow with pushing it into mainline. Since it started baking in linux-next we had a kbuild-bot issue raised and one from Joe Perches on the MAINTAINERS entry, for which I'm including fixes here. Signed-off-by:
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
amdgpu: - Switch to HMM for userptr (reverted until HMM fixes land) - New experimental SMU 11 replacement for powerplay for vega20 (not enabled by default) - Initial RAS support for vega20 - BACO support for vega12 - BACO fixes for vega20 - Rework IH handling for page fault and retry interrupts - Cleanly split CPU and GPU paths for GPUVM updates - Powerplay fixes - XGMI fixes - Rework how DC interacts with atomic for planes - Clean up and simplify DC/Powerplay interfaces - Misc cleanups and bug fixes amdkfd: - Switch to HMM for userptr (reverted until HMM fixes land) - Add initial RAS support - MQD fixes ttm: - Unify DRM_FILE_PAGE_OFFSET handling - Account for kernel allocations in kernel zone only - Misc cleanups Signed-off-by:
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- 02 Apr, 2019 6 commits
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Gerd Hoffmann authored
Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Reviewed-by:
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Gerd Hoffmann authored
Signed-off-by:
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Alex Deucher authored
Fixes warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] on 32 bit platforms. Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Gerd Hoffmann authored
Signed-off-by:
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Gerd Hoffmann authored
Signed-off-by:
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Gerd Hoffmann authored
Signed-off-by:
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- 01 Apr, 2019 9 commits
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Liviu Dudau authored
The Device Tree bindings documentation file is in a simplified path that doesn't match the MAINTAINERS entry. Reported-by:
Joe Perches <joe@perches.com> Reviewed-by:
James Qian Wang (Arm Technology China) <james.qian.wang@arm.com> Signed-off-by:
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Liviu Dudau authored
We don't call this function if CONFIG_DEBUG_FS is not defined, but we should not be compiling it either, as the declaration of the debugfs core functions is not included. Reported by the kbuild test robot. Reviewed-by:
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Kangjie Lu authored
pm_runtime_get_sync could fail and thus deserves a check. The patch adds such a check and return its error code upstream if it indeed failed. Signed-off-by:
Kangjie Lu <kjlu@umn.edu> Signed-off-by:
Mukesh Ojha <mojha@codeaurora.org>
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Qiang Yu authored
Signed-off-by:
Qiang Yu <yuq825@gmail.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Acked-by:
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Qiang Yu authored
- Mali 4xx GPUs have two kinds of processors GP and PP. GP is for OpenGL vertex shader processing and PP is for fragment shader processing. Each processor has its own MMU so prcessors work in virtual address space. - There's only one GP but multiple PP (max 4 for mali 400 and 8 for mali 450) in the same mali 4xx GPU. All PPs are grouped togather to handle a single fragment shader task divided by FB output tiled pixels. Mali 400 user space driver is responsible for assign target tiled pixels to each PP, but mali 450 has a HW module called DLBU to dynamically balance each PP's load. - User space driver allocate buffer object and map into GPU virtual address space, upload command stream and draw data with CPU mmap of the buffer object, then submit task to GP/PP with a register frame indicating where is the command stream and misc settings. - There's no command stream validation/relocation due to each user process has its own GPU virtual address space. GP/PP's MMU switch virtual address space before running two tasks from different user process. Error or evil user space code just get MMU fault or GP/PP error IRQ, then the HW/SW will be recovered. - Use GEM+shmem for MM. Currently just alloc and pin memory when gem object creation. GPU vm map of the buffer is also done in the alloc stage in kernel space. We may delay the memory allocation and real GPU vm map to command submission stage in the furture as improvement. - Use drm_sched for GPU task schedule. Each OpenGL context should have a lima context object in the kernel to distinguish tasks from different user. drm_sched gets task from each lima context in a fair way. mesa driver can be found here before upstreamed: https://gitlab.freedesktop.org/lima/mesa v8: - add comments for in_sync - fix ctx free miss mutex unlock v7: - remove lima_fence_ops with default value - move fence slab create to device probe - check pad ioctl args to be zero - add comments for user/kernel interface v6: - fix comments by checkpatch.pl v5: - export gp/pp version to userspace - rebase on drm-misc-next v4: - use get param interface to get info - separate context create/free ioctl - remove unused max sched task param - update copyright time - use xarray instead of idr - stop using drmP.h v3: - fix comments from kbuild robot - restrict supported arch to tested ones v2: - fix syscall argument check - fix job finish fence leak since kernel 5.0 - use drm syncobj to replace native fence - move buffer object GPU va map into kernel - reserve syscall argument space for future info - remove kernel gem modifier - switch TTM back to GEM+shmem MM - use time based io poll - use whole register name - adopt gem reservation obj integration - use drm_timeout_abs_to_jiffies Cc: Eric Anholt <eric@anholt.net> Cc: Rob Herring <robh@kernel.org> Cc: Christian König <ckoenig.leichtzumerken@gmail.com> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Rob Clark <robdclark@gmail.com> Cc: Dave Airlie <airlied@gmail.com> Signed-off-by:
Andreas Baierl <ichgeh@imkreisrum.de> Signed-off-by:
Erico Nunes <nunes.erico@gmail.com> Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Marek Vasut <marex@denx.de> Signed-off-by:
Simon Shields <simon@lineageos.org> Signed-off-by:
Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by:
Rob Herring <robh@kerrnel.org> Signed-off-by:
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Eric Anholt authored
Otherwise, you sometimes decode the ident fields based on 0xdeadbeef register reads. Signed-off-by:
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Eric Anholt authored
This makes sure the vc4_reset doesn't hit an obscure race with the GET_PARAM ioctl, fixes a decrement outside of the lock, and prevents future code from making mistakes with the weird return value of pm_runtime_get_sync(). Signed-off-by:
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Eric Anholt authored
Now I can extend the stats without more copy and pasting between the two. Signed-off-by:
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Dan Carpenter authored
The shmem->pages[] array has "num_pages" elements so the > should be >= to prevent reading beyond the end of the array. The shmem->pages[] array is allocated in drm_gem_shmem_prime_import_sg_table(). Fixes: 2194a63a ("drm: Add library for shmem backed GEM objects") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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