- 19 Oct, 2015 22 commits
-
-
Vladimir Zapolskiy authored
The change corrects cpu compatible property to a defined one, see Documentation/devicetree/bindings/arm/cpus.txt Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Vladimir Zapolskiy authored
The change corrects cpu compatible property to a defined one, see Documentation/devicetree/bindings/arm/cpus.txt Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Adrian Alonso authored
Add device tree node to support iomuxc-lpsr controller, fsl,input-sel phandle allows to get input select register base address which is shared from main iomuxc controller. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fugang Duan authored
Enable fec1 and fec2 for i.MX7d-sdb board. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Adrian Alonso authored
- Add imx7 SoC GPIO1 pad iomuxc settings <mux_reg conf_reg input_reg mux_mode input_val> - Fix UART input select daisy chain setting values Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Yuan Yao authored
The INA220 monitors both shunt drop and supply voltage. Signed-off-by: Yuan Yao <yao.yuan@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Alison Wang authored
This patch adds dma-coherent property for eTSEC nodes, so coherent DMA operations are supported. Signed-off-by: Alison Wang <alison.wang@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fabio Estevam authored
Add support for USBOTG1 and USBOTG2. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fabio Estevam authored
Add USB OTG and Host support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fugang Duan authored
Add fec1 and fec2 nodes for i.MX7d soc. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Horia Geantă authored
Signed-off-by: Horia Geantă <horia.geanta@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Haibo Chen authored
Add touch screen surpport for i.MX6UL-EVK board. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Haibo Chen authored
Add imx6ul touchscreen controller support. TSC module need ADC2 module to measure the touchscreen coordinate value. This patch put TSC and ADC2 together, make ADC2 module only be used for TSC, can't be used as a normal ADC. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fabio Estevam authored
Add the PWM1-4 nodes. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Fabio Estevam authored
The DCP block present on MX6SL is compatible with the one on MX28, so add the compatible string and also complete the interrupt entries. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Rafał Miłecki authored
Starting with commit 8947e396 ("Documentation: dt: mtd: replace "nor-jedec" binding with "jedec, spi-nor"") we have "jedec,spi-nor" binding indicating support for JEDEC identification. Use it for all flashes that are supposed to support READ ID op according to the datasheets. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Stefan Wahren authored
This patch enables On Chip OTP support for i.MX23 and i.MX28 SoCs, but keeps the old compatible string. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Haibo Chen authored
imx7d-sdb board has a eMMC5.0 on usdhc3. This eMMC support HS400. This patch add usdhc3 support for HS400 Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Acked-by: Dong Aisheng <aisheng.dong@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Anson Huang authored
i.MX6UL can be powered off by programming SNVS. When long press ON/OFF button(5 seconds), PMIC_ON_REQ pin will be set to low and external PMIC will be powered off. And system can be powered on by long press ON/OFF button again. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Anson Huang authored
Add MMDC support for i.MX6UL. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Anson Huang authored
Add SRAM support for i.MX6UL, it has 128KB ocram starting from 0x900000. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Shawn Guo authored
The i.MX clock updates for 4.4: - A couple of fixes on i.MX31 and i.MX35 clock initialization functions which makes mxc_timer_init() currently be called twice for DT boot. - Increase i.MX6UL AXI bus clock rate to 264MHz which is the optimal design target. - Add a few missing clocks, ADC clock for i.MX7D, OCOTP clock for Vybrid, and SPDIF_GCLK for i.MX6. - A series from Lucas to fix early debug UART clock setup. This is currently a one-off fix for i.MX platform, and can be extended to become a generic solution later.
-
- 12 Oct, 2015 1 commit
-
-
Shengjiu Wang authored
Correct SPDIF clock setting issue in clock tree, the SPDIF_GCLK is also one clock of SPDIF, which is missed before. We found an issue that imx can't enter low power mode with spdif if IMX6x_CLK_SPDIF is used as the core clock of spdif. Because spdif driver will register IMX6x_CLK_SPDIF clock to regmap, regmap will do clk_prepare in init function, then IMX6x_CLK_SPDIF clock is prepared in probe, so its parent clock (PLL clock) is prepared, the prepare operation of PLL clock is to enable the clock. But I.MX needs all PLL clock is disabled, then it can enter low power mode. So we can't use IMX6x_CLK_SPDIF as the core clock of spdif, the correct spdif core clock is SPDIF_GCLK, which share same gate bit with IMX6x_CLK_SPDIF clock. SPDIF_GCLK's parent clock is ipg clock. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 09 Oct, 2015 1 commit
-
-
Haibo Chen authored
Add ADC root clock support in imx7d clock tree. Signed-off-by: Haibo Chen <haibo.chen@freescale.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 30 Sep, 2015 1 commit
-
-
Alexander Stein authored
mxc_timer_init must not be called from within mx31_clocks_init_dt. It will eventually be called by imx31_timer_init_dt (drivers/clocksource/timer-imx-gpt.c). This arranges the initialization code similar to clk-imx27.c Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 26 Sep, 2015 8 commits
-
-
Lucas Stach authored
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Lucas Stach authored
Both earlycon and eralyprintk depend on the bootloader setup UART clocks being retained. This patch adds the common logic to detect such situations and make the information available to the clock drivers, as well as adding the facilities to disable those clocks at the end of the kernel init. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 23 Sep, 2015 2 commits
-
-
Alexander Stein authored
mxc_timer_init must not be called from within mx35_clocks_init_dt. It will eventually be called by imx31_timer_init_dt (drivers/clocksource/timer-imx-gpt.c). This arranges the initialization code similar to clk-imx27.c Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
Sanchayan Maity authored
Add clock support for Vybrid On-Chip One Time Programmable (OCOTP) controller. While the OCOTP block does not require explicit clock gating, for programming the OCOTP timing register the clock rate of ipg clock is required for timing calculations related to fuse and shadow register read sequence. We explicitly specify the ipg clock for OCOTP as a result. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 17 Sep, 2015 1 commit
-
-
Anson Huang authored
On i.MX6UL, AXI clock rate's design target is 264MHz, but by default it is only set to 198MHz which is NOT good enough for performance, this patch increases AXI clock rate from 198MHz to 264MHz to meet the design target, this is done by switching its parent clock "periph" from 396MHz PFD to 528MHz PLL. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-
- 12 Sep, 2015 4 commits
-
-
Linus Torvalds authored
-
git://git.kernel.org/pub/scm/linux/kernel/git/jesper/crisLinus Torvalds authored
Pull CRIS updates from Jesper Nilsson: "Mostly removal of old cruft of which we can use a generic version, or fixes for code not commonly run in the cris port, but also additions to enable some good debug" * tag 'cris-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris: (25 commits) CRISv10: delete unused lib/dmacopy.c CRISv10: delete unused lib/old_checksum.c CRIS: fix switch_mm() lockdep splat CRISv32: enable LOCKDEP_SUPPORT CRIS: add STACKTRACE_SUPPORT CRISv32: annotate irq enable in idle loop CRISv32: add support for irqflags tracing CRIS: UAPI: use generic types.h CRIS: UAPI: use generic shmbuf.h CRIS: UAPI: use generic msgbuf.h CRIS: UAPI: use generic socket.h CRIS: UAPI: use generic sembuf.h CRIS: UAPI: use generic sockios.h CRIS: UAPI: use generic auxvec.h CRIS: UAPI: use generic headers via Kbuild CRIS: UAPI: fix elf.h export CRIS: don't make asm/elf.h depend on asm/user.h CRIS: UAPI: fix ptrace.h CRISv32: Squash compile warnings for axisflashmap CRISv32: Add GPIO driver to the default configs ...
-
Linus Torvalds authored
rq_data_dir() returns either READ or WRITE (0 == READ, 1 == WRITE), not a boolean value. Now, admittedly the "!= 0" doesn't really change the value (0 stays as zero, 1 stays as one), but it's not only redundant, it confuses gcc, and causes gcc to warn about the construct switch (rq_data_dir(req)) { case READ: ... case WRITE: ... that we have in a few drivers. Now, the gcc warning is silly and stupid (it seems to warn not about the switch value having a different type from the case statements, but about _any_ boolean switch value), but in this case the code itself is silly and stupid too, so let's just change it, and get rid of warnings like this: drivers/block/hd.c: In function ‘hd_request’: drivers/block/hd.c:630:11: warning: switch condition has boolean value [-Wswitch-bool] switch (rq_data_dir(req)) { The odd '!= 0' came in when "cmd_flags" got turned into a "u64" in commit 5953316d ("block: make rq->cmd_flags be 64-bit") and is presumably because the old code (that just did a logical 'and' with 1) would then end up making the type of rq_data_dir() be u64 too. But if we want to retain the old regular integer type, let's just cast the result to 'int' rather than use that rather odd '!= 0'. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-
Linus Torvalds authored
Fix up the writeback plugging introduced in commit d353d758 ("writeback: plug writeback at a high level") that then caused problems due to the unplug happening with a spinlock held. * writeback-plugging: writeback: plug writeback in wb_writeback() and writeback_inodes_wb() Revert "writeback: plug writeback at a high level"
-