- 06 Apr, 2016 40 commits
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add callbacks interface for clock and powergating. Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
Jammy Zhou <Jammy.Zhou@amd.com> Reviewed-by:
Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit b1132013) Signed-off-by:
Alberto Milone <alberto.milone@canonical.com> Signed-off-by:
Tim Gardner <tim.gardner@canonical.com>
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Interface for clock and power gating handling. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Implement displaygap programming for tonga. This is required for properly mclk switching. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add support for display configuration changes to the event manager. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This allows the eventmgr to properly update the displaygap on certain power events. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Displaygap support is required for proper mclk switching. Signed-off-by:
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Eric Huang authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Switch over to handling in the powerplay module. Reviewed-by:
Eric Huang <JinHuiEric.Huang@amd.com> (cherry picked from commit 899fa4c0) Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This option can be used to enable the new powerplay implementation, and it is disabled by default. Signed-off-by:
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Eric Huang authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This enabled DPM support for Fiji. DPM is dynamic clock and voltage scaling. v2: rename fiji_hwmgr_early_init to fiji_hwmgr_init v3: (agd) fold in endian fix, additional function addition Reviewed-by:
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Eric Huang authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add support for the SMU manager for Fiji. This handles the firmware loading for other IP blocks (GFX, SDMA, etc.). Reviewed-by:
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Eric Huang authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add some new functions to support Fiji. Split out from the previous patch. Reviewed-by:
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Eric Huang authored
BugLink: http://bugs.launchpad.net/bugs/1546572 New headers for Fiji. Reviewed-by:
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yanyang1 authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This implements DPM for tonga. DPM handles dynamic clock and voltage scaling. v2: merge all the patches related with tonga dpm v3: merge dpm force level fix, cgs display fix, spelling fix Reviewed-by:
yanyang1 <young.yang@amd.com> Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 The SMU manager handles firmware loading for other IP blocks (GFX, SDMA, etc.). This implements it for Tonga. v3: delete peci sub-module v2: use cgs interface directly Signed-off-by:
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yanyang1 authored
BugLink: http://bugs.launchpad.net/bugs/1546572 These headers provide the SMU interface used by the driver. Reviewed-by:
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yanyang1 authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Move smu7.h, smu7_discrete.h and smu7_fusion.h from amdgpu to powerplay. Reviewed-by:
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yanyang1 authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add ixSWRST_COMMAND_1 in bif_5_0_d.h. Required by new powerplay code for tonga and fiji. Reviewed-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This is the common interface for interacting with the powerplay module. v2: squash in fixes Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 The event manager handles power related driver events. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This adds clock and powergating support for CZ. v2: squash in fixes Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This patch enables basic DPM support for Carrizo. DPM handles dynamic clock and voltage scaling. v3: delete peci sub-module v2: use cgs interface directly correct define SMU_EnabledFeatureScoreboard_SclkDpmOn Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This implements the SMU firmware manager interface for CZ. Some header files are moved from amdgpu folder to powerplay as well. v3: delete peci sub-module. v2: use cgs interface directly add load_mec_firmware function Signed-off-by:
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Tim Gardner authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Fixes compile failure on non-amd64 arches: drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_thermal.c: In function 'tonga_fan_ctrl_get_fan_speed_percent': drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/tonga_thermal.c:80:11: error: 'EINVAL' undeclared (first use in this function) return -EINVAL; Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 The hwmgr handles all hardware related calls, including clock/power gating control, DPM, read and parse PPTable, etc. v5: squash in fixes v4: implement acpi's atcs function use cgs interface v3: fix code style error and add big-endian mode support. v2: use cgs interface directly in hwmgr sub-module Signed-off-by:
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Jammy Zhou authored
BugLink: http://bugs.launchpad.net/bugs/1546572 The SMUMGR is one sub-component of powerplay for SMU firmware support. The SMU handles firmware loading for other IP blocks (GFX, SDMA, etc.) on VI parts. The adds the core powerplay infrastructure to handle that. v3: direct use printk in powerplay module. v2: direct use cgs_read/write_register functions in smu-modules Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Update amdgpu to deal with the new powerplay module properly. v2: squash in fixes v3: squash in Rex's power state reporting fix Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Powerplay will use a different interface once it's integrated. These legacy pathes will be removed once powerplay is enabled by default. Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 amdgpu_pp_ip_funcs is introduced to handle the two code paths, the legacy one and the new powerplay implementation. CONFIG_DRM_AMD_POWERPLAY kernel configuration option is introduced for the powerplay component. v4: squash in fixes v3: register debugfs file when powerplay module enable v2: add amdgpu_ucode_init_bo in hw init when amdgpu_powerplay enable. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add new CGS interfaces to query display info across modules. This is nedded by the powerplay module for synchronizing with the display module. v2: (agd): fold in refresh rate fix, rebase Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add a query to get the bus number and function of the device. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Add a new driver internal interface for accessing ACPI methods. These will be used by various new components including powerplay. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 This will be shared with the new powerplay module. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 These will be shared with the new powerplay module. Signed-off-by:
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Rex Zhu authored
BugLink: http://bugs.launchpad.net/bugs/1546572 rename amdgpu_pm_state_type to amd_pm_state_type Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by:
Tom St Denis <tom.stdenis@amd.com> Signed-off-by:
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Alex Deucher authored
BugLink: http://bugs.launchpad.net/bugs/1546572 Need to properly handle the max link rate in the dpcd. This prevents some cases where 5.4 Ghz is selected when it shouldn't be. v2: simplify logic, add array bounds check Reviewed-by:
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Matt Roper authored
BugLink: http://bugs.launchpad.net/bugs/1546572 pan_display_atomic() calls drm_atomic_clean_old_fb() to sanitize the legacy FB fields (plane->fb and plane->old_fb). However it was building the plane mask to pass to this function incorrectly (the bitwise OR was using plane indices rather than plane masks). The end result was that sometimes the legacy pointers would become out of sync with the atomic pointers. If another operation tried to re-set the same FB onto the plane, we might end up with the pointers back in sync, but improper reference counts, which would eventually lead to system crashes when we accessed a pointer to a prematurely-destroyed FB. The cause here was a very subtle bug introduced in commit: commit 07d3bad6 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Wed Nov 11 11:29:11 2015 +0100 drm/core: Fix old_fb handling in pan_display_atomic. I found the crashes were most easily reproduced (on i915 at least) by starting X and then VT switching to a VT that wasn't running a console instance...the sequence of vt/fbcon entries that happen in that case trigger a reference count mismatch and crash the system. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93313Signed-off-by:
Matt Roper <matthew.d.roper@intel.com> Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch> (cherry picked from commit 7118fd9b) Signed-off-by:
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Nicolai Hähnle authored
BugLink: http://bugs.launchpad.net/bugs/1546572 In the rare situation where the kmalloc fails we're probably screwed anyway, but let's try to be more robust about it. Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
Nicolai Hähnle <Nicolai.Haehnle@amd.com> Signed-off-by:
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