- 14 Aug, 2017 11 commits
-
-
Jose Alarcon authored
This commit enables i2c recovery, supported by the i2c core subsystem. It defines the required GPIOs for SDA and SCL lines. Signed-off-by:
Jose Alarcon <jose.alarcon@ge.com> Signed-off-by:
Nandor Han <nandor.han@ge.com> Signed-off-by:
Romain Perier <romain.perier@collabora.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
-
Sanchayan Maity authored
Add support for the Toradex Apalis Evaluation Board. Signed-off-by:
Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by:
-
Sanchayan Maity authored
Add support for the Toradex Ixora V1.1 carrier board. Signed-off-by:
-
Marcel Ziswiler authored
Migrate to using functionally-reduced I2C master contained in the DWC HDMI. Therefore drop the GPIO bitbanging based i2cddc definition and modify resp. pinctrl. While at it re-order the I2C aliases to start with the generic, followed by the camera and concluded by the power I2C one. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by:
-
Marcel Ziswiler authored
Signed-off-by:
-
Marcel Ziswiler authored
Signed-off-by:
-
Marcel Ziswiler authored
Signed-off-by:
-
Marcel Ziswiler authored
Signed-off-by:
-
Marcel Ziswiler authored
Signed-off-by:
-
Sanchayan Maity authored
Split the pinctrl property for usdhc1 into a 4-bit SD interface and an extension to 8-bit. This is required to support both 8-bit and 4-bit interface on usdhc1 as per the carrier board. Signed-off-by:
-
Sanchayan Maity authored
The SD1 pinctrl-0 property is overridden but only the card detect pin is muxed, the control and data signals are not referenced at all. It worked because the bootloader muxed them to a sensible state though. Fix this. Signed-off-by:
-
- 05 Aug, 2017 6 commits
-
-
Marcin Niestroj authored
Support proper system power-off, which disables main regulator. This results in much lower power consumption and support of power-on issued by button press. Signed-off-by:
Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by:
-
Patrick Bruenn authored
The CX9020 differs from i.MX53 Quick Start Board by: - use uart2 instead of uart1 - DVI-D connector instead of VGA - no audio - no SATA connector - CCAT FPGA connected to emi - enable rtc Signed-off-by:
Patrick Bruenn <p.bruenn@beckhoff.com> Signed-off-by:
-
Patrick Bruenn authored
UART2 on EIM_D26 - EIM_D29 pins supports interchanging RXD/TXD pins and RTS/CTS pins. One board using these alternate settings is Beckhoff CX9020. Add the alternative configuration here, to make it available to others, too. Signed-off-by:
-
Patrick Bruenn authored
The i.MX53 has an integrated secure real time clock. Add it to the dtsi. Signed-off-by:
-
Patrick Bruenn authored
- add vendor prefix bhf for Beckhoff - add new board binding bhf,cx9020 Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
Steffen Trumtrar authored
Add a devicetree entry for the Random Number Generator Version B (RNGB). The driver for RNGC supports version B as well. Signed-off-by:
Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by:
Martin Kaiser <martin@kaiser.cx> Signed-off-by:
-
- 03 Aug, 2017 4 commits
-
-
Fabio Estevam authored
MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 is connected to the INT1 pin of the FXLS8471Q accelerometer, so remove it from the unrelated ENET group. Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
-
Fabio Estevam authored
Add support for Flexcan. Signed-off-by:
-
Stefan Agner authored
The Colibri iMX7 modules come with 512MB on-module SLC NAND flash populated. Make use of it by enabling the GPMI controller. Signed-off-by:
Stefan Agner <stefan@agner.ch> Tested-by:
Han Xu <han.xu@nxp.com> Signed-off-by:
-
Stefan Agner authored
Add i.MX 7 APBH DMA and GPMI NAND modules. Signed-off-by:
-
- 26 Jul, 2017 2 commits
-
-
Gary Bisson authored
Declared as a regulator since the driver doesn't have a reset-gpios property for this. This ensures that the PHY is woken up, not depending on the state the second stage bootloader leaves the pin. This is a workaround until a proper mechanism is provided to reset such devices like the pwrseq library [1] for instance. [1] https://lkml.org/lkml/2017/2/10/779Signed-off-by:
Gary Bisson <gary.bisson@boundarydevices.com> Reviewed-by:
-
Gary Bisson authored
Declared as a regulator since the driver doesn't have a reset-gpios property for this. This ensures that the PHY is woken up, not depending on the state the second stage bootloader leaves the pin. This is a workaround until a proper mechanism is provided to reset such devices like the pwrseq library [1] for instance. [1] https://lkml.org/lkml/2017/2/10/779Signed-off-by:
-
- 25 Jul, 2017 9 commits
-
-
Oleksij Rempel authored
gpio-line-names may help to make work with GPIOs from user space easier. Following examples are provided with libgpiod https://github.com/brgl/libgpiod : |# Toggle a GPIO by name, then wait for the user to press ENTER. |$ gpioset --mode=wait `gpiofind "USR-LED-2"`=1 |# Pause execution until a single event of any type occurs. Don't print |# anything. Find the line by name. |$ gpiomon --num-events=1 --silent `gpiofind "USR-IN"` Used names was taken from RIoTboard schematics, version 1 (2013.12.07). Signed-off-by:
Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
-
Andrew Lunn authored
The Micrel PHY has its interrupt pin connected to a GPIO line. Wire this up in the device tree. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Tested-by:
Chris Healy <cphealy@gmail.com> Reviewed-by:
-
Andrew Lunn authored
The Marvell switch has its interrupt pin connected to a GPIO line. Wire this up in the device tree. This then allows us to use interrupts from the embedded Ethernet PHYs in the switch. Also wire them up in device tree. Signed-off-by:
-
Andrew Lunn authored
The Marvell switch has an EEPROM connected to it. List the size in DT, in order to enable access to it via ethtool. Signed-off-by:
-
Andrew Lunn authored
The RDU2 has a Marvell 88E6352 switch. Both the FEC and the i210 Ethernet interfaces are connected to the switch. Make the FEC the DSA "CPU" port, and the i210 as a regular port on the switch. Signed-off-by:
-
Andrew Lunn authored
The FEC has a Micrel PHY connected to it. This PHY is managed using the bit-banging MDIO bus. Add this to the device tree. Signed-off-by:
-
Marco Franchi authored
Currently the LCD is turned on thanks to the bootloader initialization. In order to make the kernel to turn on the LCD on is own, pass the 'enable-gpios' and 'power-supply' properties. Also, the GPIO1_IO01 is not used as PWM functionality on this board. It is connected to the PWREN pin of connector J14 and has a GPIO function, so remove the PWM1 node and change the GPIO1_IO01 IOMUX to GPIO function. Signed-off-by:
Marco Franchi <marco.franchi@nxp.com> Signed-off-by:
-
Marco Franchi authored
It is preferred to use the panel compatible string rather than passing the LCD timming in the device tree. So pass the "innolux,at043tn24" compatible string to describe the parallel LCD on this board. Signed-off-by:
-
Fabio Estevam authored
The 'uart-has-rtscts' property should be used when the board exposes the native RTS and CTS UART pins. On the imx6qdl-gw5xxx boards such pins are not used, so remove the 'uart-has-rtscts' property to make the hardware description correct. Documentation/devicetree/bindings/serial/serial.txt states that 'uart-has-rtscts' and 'rts-gpios' properties are mutually exclusive. Signed-off-by:
-
- 16 Jul, 2017 8 commits
-
-
Marco Franchi authored
Pass the 'backlight' property as described in Documentation/devicetree/bindings/display/panel/simple-panel.txt Signed-off-by:
-
Marco Franchi authored
It is preferred to use the panel compatible string rather than passing the LCD timming in the device tree. So pass the "innolux,at043tn24" compatible string to describe the parallel LCD on this board. Signed-off-by:
-
Guy Shapiro authored
Make the syscon-poweroff driver change only the shutdown bits on the SNVS_LP control register. This change fixes an issue with the RTC wakeup alarm, that was previously disabled during power off. Signed-off-by:
Guy Shapiro <guy.shapiro@mobi-wize.com> Reviewed-by:
-
Fabio Estevam authored
imx6qdl-icore-rqs boards use sgtl5000 codec and the machine file (imx-sgtl5000) already sets SSI in slave mode and codec in master mode, so there is no need for having this property. Signed-off-by:
-
Fabio Estevam authored
Pass the phy-reset-gpios property so that Ethernet PHYs can go through a proper reset. Signed-off-by:
-
Martyn Welch authored
The IPU that drives HDMI must have its pre_sel set to pll2_pfd_396m to avoid stepping on the LVDS output's toes, as the PLL can't be clocked to the pixel clock and to the LVDS serial clock (3.5*pixel clock) at the same time. As we are using ipu1_di0 and ipu2_di0, ensure both are switched to to pll2_pfd2_396m to avoid issues. The LDB driver will switch the required IPU to ldb_di1 when it uses it to drive LVDS. Signed-off-by:
Martyn Welch <martyn.welch@collabora.co.uk> Signed-off-by:
-
Gautam Bhat authored
According to mx7sabresd schematics the MIPI CSI/DSI voltage rails should be 2.8V but the voltage provided is a maximum of 3.3V and minimum of 1.8V. Providing such a higher voltage might damage the peripherals and violates the schematic settings. Signed-off-by:
Gautam Bhat <mindentropy@gmail.com> Reviewed-by:
-
Tim Harvey authored
Enables the ADV7180 analog video decoder sensor connected to the IMX6 IPU on various Gateworks Ventana boards. Signed-off-by:
Tim Harvey <tharvey@gateworks.com> Signed-off-by:
-
