- 18 Oct, 2022 7 commits
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Krzysztof Kozlowski authored
The common Qualcomm TLMM pin controller schema for pin mux and config already brings requirement of function for gpio pins and the definition of drive-strength. Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-18-krzysztof.kozlowski@linaro.orgSigned-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The SC7280 pinctrl driver supports bias-bus-hold and input-enable, and DTS already use it (sc7280-idp). Acked-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016172212.49105-17-krzysztof.kozlowski@linaro.orgSigned-off-by:
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Krzysztof Kozlowski authored
SC7280 has 175 GPIOs (gpio0-174), so correct size of gpio-line-names and narrow the pattern for matching pin names. Acked-by:
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Krzysztof Kozlowski authored
The SM8250 pinctrl driver supports input-enable and DTS already use it (sm8250-sony-xperia-edo-pdx203). Acked-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. The change causes indentation decrement, so the diff-hunk looks big, but there are no functional changes in the subnode "properties" section. The only difference there is removal of blank lines between common GPIO pinconf properties. Acked-by:
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Krzysztof Kozlowski authored
The common Qualcomm TLMM pin controller schema for pin mux and config already brings requirement of function for gpio pins and the definition of drive-strength. Acked-by:
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Krzysztof Kozlowski authored
Document common GPIO properties (gpio-reserved-ranges and gpio-line-names), already used on qrb5165-rb5 board. Acked-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by:
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- 17 Oct, 2022 33 commits
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Krzysztof Kozlowski authored
Convert Qualcomm SDM630 and SDM660 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by:
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Krzysztof Kozlowski authored
Convert Qualcomm SDM845 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by:
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Neil Armstrong authored
Convert the MDM9515 pinctrl bindings to dt-schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, optional children with '-pins'). Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20221005-mdm9615-pinctrl-yaml-v2-1-639fe67a04be@linaro.org [krzk: drop function from required] Signed-off-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Previous adjustment missefd one spot. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. qcom-sdx55-telit-fn980-tlb.dtb: pinctrl@f100000: 'pcie_ep_clkreq_default', 'pcie_ep_perst_default', 'pcie_ep_wake_default' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
Stephan Gerhold <stephan@gerhold.net> Reviewed-by:
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4 and sdc3 functions and DTS already uses it: qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ... qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed: 'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+' Reviewed-by: -
Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
Bindings example should be indented with 4-spaces. Reviewed-by:
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Krzysztof Kozlowski authored
Reference common Qualcomm TLMM pin controller schema, to bring common properties, other pinctrl schemas and additional checks, like function required only for GPIOs. Reviewed-by:
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Krzysztof Kozlowski authored
The TLMM pin controller follows generic pin-controller bindings, so should have subnodes with '-state' and '-pins'. Otherwise the subnodes (level one and two) are not properly matched. This method also unifies the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. Reviewed-by:
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Krzysztof Kozlowski authored
One pinxmux node can have more than 4 pins to configure: ['gpio1', 'gpio3', 'gpio4', 'gpio5', 'gpio6', 'gpio7', 'gpio8', 'gpio10', 'gpio11', 'gpio12', 'gpio13', 'gpio14', 'gpio15', 'gpio17'] is too long Reviewed-by:
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Krzysztof Kozlowski authored
The pin controller driver has BLSP functions from 0 to 5, not 1 to 6. Add missing blsp0_i2c, blsp0_spi (already used in ipq6018-cp01-c1) and blsp0_uart. Drop blsp6_i2c and blsp6_spi. This fixes dtbs_check warning: ipq6018-cp01-c1.dtb: pinctrl@1000000: spi-0-state: 'oneOf' conditional failed, one must be fixed: 'bias-pull-down', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' 'blsp0_spi' is not one of ['adsp_ext', 'alsp_int', ..... Reviewed-by: -
Krzysztof Kozlowski authored
The IPQ6018 pinctrl driver supports qpic_pad and DTS already uses it: 'qpic_pad' is not one of ['adsp_ext', 'alsp_int', 'atest_bbrx0', ... Reviewed-by:
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Krzysztof Kozlowski authored
Certain pins, like SDcard related, do not have functions and such should not be required. Add a check for this in common Qualcomm TLMM pin controller schema. Reviewed-by:
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Krzysztof Kozlowski authored
The existing SC7280 LPASS pin controller nodes use bias-bus-hold and input-enable, so allow them. Squash also blank lines for readability. Acked-by:
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Krzysztof Kozlowski authored
The existing SC7280 LPASS pin controller nodes use bias-bus-hold, so allow it. Squash also blank lines for readability. Acked-by:
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