- 29 Jun, 2021 1 commit
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Tejas Upadhyay authored
Removing force probe protection from JSL platform. Did not observe warnings, errors, flickering or any visual defects while doing ordinary tasks like browsing and editing documents in a two monitor setup. For more info drm-tip idle run results : https://intel-gfx-ci.01.org/tree/drm-tip/drmtip.html? Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by:
Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@intel.com> Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by:
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- 25 Jun, 2021 2 commits
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Lucas De Marchi authored
Since we are already loop through the levels to sanitize them, mark what is the real max_level so it can be used in subsequent loop. This makes it simpler to later add the adjustment latency to "valid levels". No change in behavior, just makes the code easier to follow. Signed-off-by:
Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:
Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210622212210.3746133-2-lucas.demarchi@intel.com
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Lucas De Marchi authored
We should no longer increment level 0 by 1usec when we have 16Gb DIMMs. Instead spec says to add 3usec (as opposed to 2) to each valid level when punit replies 0 to level 0. So set wm_lv_0_adjust_needed to false for DISPLAY_VER() >= 12 and set the proper adjustment value when handling WaWmMemoryReadLatency. Bspec: 49326, 4381 Signed-off-by:
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- 24 Jun, 2021 25 commits
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José Roberto de Souza authored
PSR2 is not compatible with DC3CO or VRR in this stepping, so not enabling PSR2 if VRR will be enabled or not enabling DC3CO if PSR2 is possible. BSpec: 54369 Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by:
José Roberto de Souza <jose.souza@intel.com> Reviewed-by:
Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210616203158.118111-5-jose.souza@intel.com
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José Roberto de Souza authored
In some modes there is not enough time during hblank to transmit PSR2 SDP plus the pixels CRC SDP, if such case happens PSR2 needs to be disabled. But eDP spec 1.4b allows to transmit PSR2 SDP in a prior scanline alone and than later the CRC SDP, allowing PSR2 to be enabled in those hblank constrained modes. BSpec: 49274 Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by:
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José Roberto de Souza authored
Another WA that is required for PSR2. BSpec: 54369 Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Cc: Matt Atwood <matthew.s.atwood@intel.com> Signed-off-by:
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José Roberto de Souza authored
The PSR2_CTL io buffer wake and fast wake values do not match expected in pre production hardware, so here adding a table that matches with HW to program it with values that HW expect. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by:
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José Roberto de Souza authored
We were only handling X and width granularity, what was causing issues when sink had a granularity different than 4. While at it, renaming su_x_granularity to su_w_granularity to better match reality. Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com> Signed-off-by:
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Ville Syrjälä authored
Clear out the straggler 'intel_crtc' variables. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210609085632.22026-7-ville.syrjala@linux.intel.comReviewed-by:
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Ville Syrjälä authored
Sort out the mess with the local variables in intel_fbdev_init_bios(). Get rid of all aliasing pointers, use standard naming/types, and introduce a few more locals in the loops to avoid the hard to read long struct walks. While at we also polish the debugs a bit to use the canonical [CRTC:%d:%s] style. Signed-off-by:
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Ville Syrjälä authored
Just pass the full atomic state+crtc to the pre-skl watermark functions, and clean up the types/variable names around the area. Note that having both .compute_pipe_wm() and .compute_intermediate_wm() is entirely redundant now. We could unify them to a single vfunc. But let's do this one step at a time. Signed-off-by:
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Ville Syrjälä authored
Sort out the mess with the local variables in intel_find_initial_plane_obj(). Get rid of all aliasing pointers and use standard naming/types. Signed-off-by:
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Ville Syrjälä authored
Sort out the mess with the local variables in intel_get_load_detect_pipe(). Get rid of all aliasing pointers and use standard naming/types. Signed-off-by:
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Ville Syrjälä authored
Use drm_crtc_mask() instead of hand rolling it. Signed-off-by:
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Ville Syrjälä authored
Since the llb allocation has a fixed size, let's grab it before the potentially variable sized cfb. That should avoid some allocation failure cases once we allow different compression ratios for FBC1. Signed-off-by:
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Ville Syrjälä authored
Write the cfb allocation loop as an actual loop instead of some hard to read goto thing. Signed-off-by:
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Ville Syrjälä authored
Declutter find_compression_limit() a bit by extracting intel_fbc_stolen_end(). Signed-off-by:
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Ville Syrjälä authored
Exctract the limit->register value conversion into a common helper. Signed-off-by:
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Ville Syrjälä authored
The limit++ for the 16bpp case is nonsense since the compression limit is always supposed to be power of two. Replace it with <<=1. Signed-off-by:
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Ville Syrjälä authored
No point in passing the mm node explicitly to find_compression_limit() since it's always the same node for the cfb. Signed-off-by:
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Ville Syrjälä authored
Not much point in dynamically allocating the line length buffer mm node that I can see. Just embed it directly like we do the for the cfb node. One less failure point to worry about. Signed-off-by:
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Ville Syrjälä authored
Extract the CFB (+LLB) programming into a separate function. Signed-off-by:
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Ville Syrjälä authored
Let's call the compression limit the limit. Signed-off-by:
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Ville Syrjälä authored
adls is supposed to use special buf trans tables. Add what's missing. v2: Drop the RBR/HBR table since it's the same as for tgl Signed-off-by:
Jani Nikula <jani.nikula@intel.com>
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Ville Syrjälä authored
All the foo_get_buf_trans_hdmi() functions just return a single table. Remove the pointless wrappers. v2: Handle adl-p Signed-off-by:
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Ville Syrjälä authored
The jsl/ehl buf trans functions are needlessly complicated. Simplify them. Signed-off-by:
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Ville Syrjälä authored
EHL is supposed to use special buf trans values for eDP HBR2+. Add such a table. Signed-off-by:
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Lee Shawn C authored
This workaround is specific for a particular panel on Google chromebook project. When user space daemon enter idle state. It request adjust brightness to 0, turn backlight_enable signal off and keep eDP main link active. On general LCD, this behavior might not be a problem. But on this panel, its tcon would expect source to execute full eDP power off sequence after drop backlight_enable signal. Without eDP power off sequence. Even source try to turn backlight_enable signal on and restore proper brightness level. This panel is not able to light on again. This WA ignored the request from user space daemon to disable backlight_enable signal and keep it on always. When user space request kernel to turn eDP display off, kernel driver still can control backlight_enable signal properly. It would not impact standard eDP power off sequence. v2: 1. modify the quirk name and debug messages. 2. unregister backlight.power callback for specific device. v3: 1. modify debug output messages. 2. use DMI_EXACT_MATCH instead of DMI_MATCH. Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Imre Deak <imre.deak@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Cooper Chiou <cooper.chiou@intel.com> Signed-off-by:Lee Shawn C <shawn.c.lee@intel.com> Signed-off-by:
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- 23 Jun, 2021 12 commits
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Ville Syrjälä authored
The icl combo phy DP HBR2 is identical to the eDP HBR3 table. Get rid of one redundant copy. Signed-off-by:
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Ville Syrjälä authored
For some reason the dg1 buf trans tables have been stuffed into icl_get_combo_buf_trans_edp() which doesn't even get called on dg1. Split them out into a proper dg1 specific function, and also make sure we use the proper buf trans tables for DP as well as eDP. v2: Add the hobl stuff Reviewed-by:
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Ville Syrjälä authored
Give RKL its own get_buf_trans() func. v2: Drop the FIXME since the spec was clarified to indicate that TGL values are used for the HDMI/eDP cases. Reviewed-by: -
Ville Syrjälä authored
Split the hsw/bdw/skl/kbl get_buf_trans() functions into clean platform specific variants. Reviewed-by:
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Ville Syrjälä authored
Convert the get_buf_trans() functions into an encoder vfunc. Allows us to get rid of bunch of platform if-ladders. v2: Handle adl-p Reviewed-by:
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Ville Syrjälä authored
Store the default HDMI buf trans entry in struct intel_ddi_buf_trans so that it's next to the actual table. This let's us start ridding ourselves of some platofrm specifics in intel_ddi_hdmi_num_entries(). Reviewed-by:
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Ville Syrjälä authored
Raise the abstraction level of the get_buf_trans() functions a bit more by returning the whole wrapper intel_ddi_buf_trans struct. v2: Handle adl-p Reviewed-by:
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Ville Syrjälä authored
Add a small helper to get the buf trans entris+num_entries from the struct. Should avoid copy-paste errors in the platform specific get_buf_trans() functions. @@ identifier T, N; @@ - *N = T.num_entries; - return T.entries; + return intel_get_buf_trans(&T, N); @@ @@ is_hobl_buf_trans(...) { ... } + + static const union intel_ddi_buf_trans_entry * + intel_get_buf_trans(const struct intel_ddi_buf_trans *ddi_translations, int *num_entries) + { + *num_entries = ddi_translations->num_entries; + return ddi_translations->entries; + } v2: Handle adl-p Reviewed-by: -
Ville Syrjälä authored
Put a wrapper struct around the buf trans tables so that we can declare the number of entries and default HDMI entry alongside the table. @wrap@ identifier old =~ "^.*translations.*"; fresh identifier new = "_" ## old; type T; @@ <... static const T - old + new [] = { ... }; + + static const struct intel_ddi_buf_trans old = { + .entries = new, + .num_entries = ARRAY_SIZE(new), + }; ...> @@ identifier wrap.old; @@ ( - ARRAY_SIZE(old) + old.num_entries | - old + old.entries ) @@ @@ union intel_ddi_buf_trans_entry { ... }; + +struct intel_ddi_buf_trans { + const union intel_ddi_buf_trans_entry *entries; + u8 num_entries; +}; v2: Handle adl-p Reviewed-by: -
Ville Syrjälä authored
Rename the dkl phy buf trans tables to follow the same naming pattern used by everyone else. v2: Handle adl-p Reviewed-by:
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Ville Syrjälä authored
In order to abstact the buf trans stuff let's wrap the platform specific structs into a union. v2: Handle adl-p Reviewed-by:
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Ville Syrjälä authored
All the other platforms handle the output_type stuff in their *_get_buf_trans() functions. Do the same for hsw/bdw/skl. Reviewed-by:
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