- 06 Mar, 2017 1 commit
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Martin Blumenstingl authored
This resets the ethernet PHY during boot to get the PHY into a "clean" state. While here also explicitly specify the phy-mode instead of relying on the default-value from meson-gx.dtsi. Signed-off-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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- 27 Jan, 2017 1 commit
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Jerome Brunet authored
OdroidC2 GbE link breaks under heavy tx transfer. This happens even if the MAC does not enable Energy Efficient Ethernet (No Low Power state Idle on the Tx path). The problem seems to come from the phy Rx path, entering the LPI state. Disabling EEE advertisement on the phy prevent this feature to be negociated with the link partner and solve the issue. Signed-off-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- 17 Jan, 2017 1 commit
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Neil Armstrong authored
The current hardware is not able to run with all cores enabled at a cluster frequency superior at 1536MHz. But the currently shipped u-boot for the platform still reports an OPP table with possible DVFS frequency up to 2GHz, and will not change since the off-tree linux tree supports limiting the OPPs with a kernel parameter. A recent u-boot change reports the boot-time DVFS around 100MHz and the default performance cpufreq governor sets the maximum frequency. Previous version of u-boot reported to be already at the max OPP and left the OPP as is. Nevertheless, other governors like ondemand could setup the max frequency and make the system crash. This patch disables the DVFS clock and disables cpufreq. Fixes: 70db166a ("ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes") Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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- 20 Oct, 2016 1 commit
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Kevin Hilman authored
Add binding and basic support for the SD/eMMC controller on Amlogic S905/GXBB devices. Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> [narmstrong: added nodes for GX, enabled SDIO on P20x] Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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- 18 Oct, 2016 2 commits
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Brian Kim authored
Enable both gxbb USB controller and add a 5V regulator for the OTG port VBUS Signed-off-by:
Brian Kim <brian.kim@hardkernel.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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Neil Armstrong authored
For boards only supporting 10/100 ethernet over a RMII PHY link, add a separate pinctrl node. By the way, rename the existing node to rgmii specific naming in all boards dts. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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- 14 Sep, 2016 1 commit
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Jerome Brunet authored
Add nodes for i2c bus on gxbb based platforms. On the OdroidC2 (I2C A) and P200 (I2C B), the pull-up resistor are present directly on the board. This indicates that these pins are dedicated to i2c. Signed-off-by:
Jerome Brunet <jbrunet@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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- 01 Sep, 2016 1 commit
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Martin Blumenstingl authored
Enable the Infrared Remote Controller on boards which have an Infrared receiver. Signed-off-by:
Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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- 01 Jun, 2016 3 commits
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Kevin Hilman authored
Add node for ethernet interface and pinctrl pins. Enable on odroid-C2 and P20x boards. Acked-by:
Carlo Caione <carlo@endlessm.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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Kevin Hilman authored
Add DT nodes for additional UARTs (UART B & C in EE domain) and add pins for all EE domain UARTs. Acked-by:
Carlo Caione <carlo@endlessm.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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Carlo Caione authored
Update DTS and DTSI files to enable the pin controller. We also now support the blinking blue LED on the Odroid-C2. Signed-off-by:
Carlo Caione <carlo@endlessm.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Kevin Hilman <khilman@baylibre.com>
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- 30 Mar, 2016 2 commits
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Kevin Hilman authored
Add minimal DT files for the Hardkernel ODROID-C2 board based on the Amlogic S905/GXBB SoC. Used the other gxbb boards from Andreas Färber as a starting point. Cc: Andreas Färber <afaerber@suse.de> Cc: Carlo Caione <carlo@endlessm.com> Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Reviewed-by:
Andreas Färber <afaerber@suse.de> Acked-by:
Arnd Bergmann <arnd@arndb.de>
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Kevin Hilman authored
Apparently, it's not valid to have an alias point to a disabled device. Fix this by moving the aliases that are used (serial0) into the files that use them, and remove aliases to disabled devices (serial1). Suggested-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Kevin Hilman <khilman@baylibre.com> Reviewed-by:
Andreas Färber <afaerber@suse.de> Acked-by:
Arnd Bergmann <arnd@arndb.de>
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- 07 Mar, 2016 1 commit
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Andreas Färber authored
Add Device Trees for Tronsmart Vega S95 Pro, Meta and Telos TV boxes. Signed-off-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Carlo Caione <carlo@endlessm.com>
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- 10 May, 2015 1 commit
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Maxime Ripard authored
The FSF address triggers a warning on checkpatch, saying that the FSF license is already present in the Linux source code, and that it has already changed in the past. Remove it from our DT, as suggested. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- 21 Jan, 2015 2 commits
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Maxime Ripard authored
Prepare the device trees to use the C preprocessor. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Hans de Goede authored
Add a dtsi file for A31s based boards. Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- 18 Nov, 2014 1 commit
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Carlo Caione authored
The board DTS is missing the machine compatible. Signed-off-by:
Carlo Caione <carlo@caione.org>
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- 25 Sep, 2014 1 commit
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Carlo Caione authored
The Meson6 SoC is produced by Amlogic inc. and it is based on 2 Cortex A9 and an ARM Mali-400 GPU. This patch adds two basic DTSI for the preliminary support of Meson and Meson6 SoCs. Another DTS is also added for supporting the atv1200 board, produced by Geniatech inc. Signed-off-by:
Carlo Caione <carlo@caione.org> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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