- 06 Mar, 2012 40 commits
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Nishanth Menon authored
twl6030_irq_set_wake is not used anywhere else in the kernel except as irq_chip.irq_set_wake. No reason for it to be exported. Also fixes build warning: drivers/mfd/twl6030-irq.c:230:5: warning: symbol 'twl6030_irq_set_wake' was not declared. Should it be static? Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Nishanth Menon authored
TWL6030 family of PMIC use a shadow interrupt status register while kernel processes the current interrupt event. However, any write(0 or 1) to register INT_STS_A, INT_STS_B or INT_STS_C clears all 3 interrupt status registers. Since clear of the interrupt is done on 32k clk, depending on I2C bus speed, we could in-adverently clear the status of a interrupt status pending on shadow register in the current implementation. This is due to the fact that multi-byte i2c write operation into three seperate status register could result in multiple load and clear of status and result in lost interrupts. Instead, doing a single byte write to INT_STS_A register with 0x0 will clear all three interrupt status registers without the related risk. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Axel Lin authored
da9052 has been converted to use regmap API, so we can remove the unused io_lock mutex. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Daniel Lezcano authored
This patch allows to decouple and recouple the gic from the PRCMU. This is needed to put the A9 core in retention mode with the cpuidle driver. It is based on top of the "DB8500 PRCMU update" patchset. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Rickard Andersson <rickard.andersson@stericsson.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Axel Lin authored
irq_base of the tps65912 irq platform data should be initialized with the board provided irq_base data. Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Jean Delvare authored
The code is currently always checking the first resource of every device only (several times.) This has been broken since the ACPI check was added in February 2010 in commit 91fedede. Fix the check to run on each resource individually, once. Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: stable@vger.kernel.org Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mark Brown authored
Fixes warnings and needed for correctness. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Axel Lin authored
Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Govindraj.R authored
There could be possible race condition where the host dev's are alloced and added to platform dev just before usbhs_init. Just move usbhs_init before adding child dev. CC: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Govindraj.R authored
Remove the hardcoded magic values for dma mask and use the dma mask api/macro available. Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Axel Lin authored
Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Axel Lin authored
The callers of pcf50633_write_block assume pcf50633_write_block return 0 on success, thus make it return 0 instead of the number of registers written on success. Currently pcf50633_write_block is called in drivers/mfd/pcf50633-irq.c and drivers/rtc/rtc-pcf50633.c. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Harald Welte <laforge@gnumonks.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Axel Lin authored
The val_len parameters for regmap_raw_write should be "count * sizeof(u8)" (or simply "count") instead of "count * sizeof(u16)". Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Axel Lin authored
The first parameter should be "number of elements" and the second parameter should be "element size". Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Linus Walleij authored
The AB9540 variant of the AB8500 is basically close enough to use the same driver. This adds the new registers and deviations for this new chip variant. Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com> Signed-off-by: Alex Macro <alex.macro@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Linus Walleij authored
This makes the AB8500 state struct contain the IRQ mask and register offsets previously hard-coded so as to make room for more AB8500 variants. Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com> Signed-off-by: Alex Macro <alex.macro@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Linus Walleij authored
There are currently four different versions of the AB8500 around: AB8500, AB8505, AB9540 and AB8540. Unfortunately: - Some of the chips (AB8500, AB8505, AB9540) cannot read the AB8500_REV_REG register but return errors - Some of them have the same ID value in the hardware register AB8500_REV_REV, for example the first versions of AB8505 and AB9540 have 0xFF in this register - just like the AB8500. So we need to be able to enforce a certain version from the platform. We do this by using the id of the platform device that provides the read/write functions. Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com> Signed-off-by: Alex Macro <alex.macro@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Linus Walleij authored
We were not freeing the irq properly in the error path in the AB8500 driver. Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com> Signed-off-by: Alex Macro <alex.macro@stericsson.com> Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mark Brown authored
The jack detection on WM1811 is often required during system suspend, add it as another check when deciding if we should suspend. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mark Brown authored
This is the default state that the runtime PM infrastructure expects so instead just kick the runtime PM core to suspend us if we're not doing anything (as is default). Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mark Brown authored
Omitted in the regmap conversion. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Felipe Contreras authored
Signed-off-by: Felipe Contreras <felipe.contreras@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Paul Parsons authored
The gpio_to_irq() macro is now defined as __gpio_to_irq() instead of IRQ_GPIO(). The __gpio_to_irq() function returns -ENXIO if the referenced gpio_chip structure does not define a to_irq() member. This is true of the asic3 gpio_chip structure, and thus calls to gpio_to_irq() now fail (for example from the gpio-vbus module). This patch defines the to_irq() member in the asic3 gpio_chip structure. Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Jesper Juhl authored
As 'make versioncheck' points out, there's no need for drivers/mfd/ab5500-core.c to #include <linux/version.h>, so this patch removes the unneeded include. Signed-off-by: Jesper Juhl <jj@chaosbits.net> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Chris Blair authored
Adds support for boards which have an STMPE GPIO device without the interrupt pin connected. This means that no interrupt can be received but the GPIO pins can still be driven and read. Cc: Grant Likely <grant.likely@secretlab.ca> Acked-by: Viresh Kumar <viresh.kumar@st.com> Tested-by: Michel Jaouen <michel.jaouen@stericsson.com> Signed-off-by: Chris Blair <chris.blair@stericsson.com> Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Chris Blair authored
Adds support for boards which have an STMPE device without the interrupt pin connected. Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Chris Blair <chris.blair@stericsson.com> Tested-by: Michel Jaouen <michel.jaouen@stericsson.com> Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Laxman Dewangan authored
Implementing irq_set_wake() so that device should able to wakeup the system through different interrupt provided by this device like gpios, onkey, rtc etc. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Sangbeom Kim authored
There are many samsung mfd devices. The s5m core driver try to support various samsung s5m series. It will cover S5M8767A and S5M8763 and S5M8751. This patch is enable to support various s5m series. Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Sangbeom Kim authored
Convert s5m core driver to use devm_kzalloc(). Signed-off-by: Sangbeom Kim <sbkim73@samsung.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Laxman Dewangan authored
irq_base of the tps65910 irq platform data should be initialized with the board provided irq_base data. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Jonghwan Choi authored
If device type is not supported in driver, have to retun error. Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Jonghwan Choi authored
This patch checks for pdata to using it. Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Jonghwan Choi authored
Remove "wm8350->irq_base = pdata->irq_base" to avoid null pointer exception and wm8350->irq_base got from irq_alloc_descs(). Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mattias Nilsson authored
This patch adds an initial PRCMU register access API, which for now should only be used for a very limited set of registers. The idea about this API is that we split the PRCMU driver in one part that deals with interaction with the PRCMU firmware and one part that simply provide write accessors in the PRCMU register range. The latter are just a collection of registers exposed in the PRCMU register range for various purposes and not related to the PRCMU firmware. Currently we support some limited GPIO, SPI and UART settings through this API. Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Jonas Aaberg authored
In prcmu firmware version 3.4.4 the issue with longer intervalls than 131 s was fixed, we don't expect the issue to creep back up. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mattias Nilsson authored
This updates the operating point handling code by: - Supporting the DDR OPP retention state. - Supporting another low operating point named APE_50_PARTLY_25_OPP - Adding an interface to figure out if the sleep state change was properly achieved. Signed-off-by: Shreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Bengt Jonsson authored
As drivers have progressed and got some more review we have consequently moved things around: - Some device drivers have changed name and some were wrong from the beginning. - We removed the dependency from some domains to the VAPE domain - SIA MMDSP, SIA PIPE, SVA MMDSP and SVA PIPE power domains are handled outside the framework while ESRAM12 and ESRAM34 are actually handled inside the PRCMU. Reviewed-by: Rickard Andersson <rickard.andersson@stericsson.com> Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com> Signed-off-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mattias Nilsson authored
This updates the clock handling in the DB8500 PRCMU driver with the latest findings and API changes related to changes in the backing firmware in the PRCMU. - Add the necessary interfaces to get the frequencies of the clocks and set the rate of some of the clocks. - Add support for controlling the clocks PLLSOC0, PLLDSI, DSI0, DSI1 and DSI escape clocks (DSInESCCLK). - Correct the PLLSDI enable/disable sequence by using the DSIPLL_CLAMPI bit. After this we will have the interfaces and code to implement the U8500 clock framework properly. Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com> Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mattias Nilsson authored
This prefixes a number of accessor functions with db8500_* since they are DB8500-specific and we need to move to this naming scheme. We also replace numerous instances of machine_is() with cpu_is() which covers the right type of ASICs rather than entire machines i.e. boards. Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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Mattias Nilsson authored
This patch exports a function that can be used to tell which version of the DB8500 PRCMU firmware is available, and revamps the firmware detection code a bit. Reviewed-by: Bengt Jonsson <bengt.g.jonsson@stericsson.com> Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com> Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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