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- 24 Apr, 2003 1 commit
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Andi Kleen authored
Don't disable the Northbridge Machine Check. Use the unrolled "INTEL_USERCOPY" too.
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- 23 Apr, 2003 1 commit
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Pavel Machek authored
Swsusp without swap makes no sense, and leads to compilation failure. So make the dependency clear in the config files.
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- 21 Apr, 2003 1 commit
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Linus Torvalds authored
of Intel CPU optimizations. From Andi Kleen.
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- 20 Apr, 2003 1 commit
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Randy Dunlap authored
This is a patch from Robert P.J. Day that replaces www.linuxdoc.org (which is outdated and unspported according to www.tldp.org) with www.tldp.org in lots of Kconfig files.
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- 08 Apr, 2003 1 commit
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Alan Cox authored
(Steve Cole and co)
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- 18 Mar, 2003 1 commit
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Andrew Morton authored
Patch from Martin J. Bligh and Dave Hansen People with ordinary PCs are accidentally turning on NUMA support, and people with NUMA machines are finding the NUMA option mysteriously disappearing. This patch sets the defaults to sane things for everyone, and only allows you to turn on NUMA with both SMP and 64Gb support on (it's useful for the distros on non-Summit boxes, but not on their UP kernels ;-)). I've also moved it below the highmem options, as it logically depends on them, so this makes more sense. For those searching for NUMA support on *real* NUMA machine, Dave has provided some guiding comments to show them what they messed up (it's totally non-obvious). Hopefully this will stop people's recent unfortunate foot-wounds (I think UP machines were defaulting to NUMA on ... oops).
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- 08 Mar, 2003 2 commits
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Andrew Morton authored
Patch from Tom Rini <trini@kernel.crashing.org> Take CONFIG_SWAP out of the top-level menu into the general setup menu. Make it dependent on CONFIG_MMU and common to all architectures.
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Martin J. Bligh authored
From Andy Whitcroft A few very simple changes in order to make CONFIG_NUMA work everywhere, so the distros can build one common binary kernel for distributions.
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- 02 Mar, 2003 1 commit
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Andrew Morton authored
Patch from Christoph Hellwig <hch@sgi.com> There's a bunch of minor fixes needed to disable the swap code for systems with mmu.
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- 28 Feb, 2003 1 commit
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Martin J. Bligh authored
This simple patch just makes sure the PIT code is available for NUMA-Q (as its TSCs are not synced). Has been tested in my tree for over a month on UP, SMP, and NUMA and compile tested against a variety of different configs.
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- 25 Feb, 2003 2 commits
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Andrew Morton authored
Use the early ioremap code to parse the Static Resource Affinity Table on x440 machines.
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Andrew Morton authored
Patch from Patricia Gaughen <gone@us.ibm.com>, Dave Hansen <haveblue@us.ibm.com> It provides a very early sort of kmap-by-hand. The patch is used by the x440 discontigmem to map the srat tables into low memory so that the memory can be setup. This remap function is used very early in the boot process... at the start of setup_arch(). This functionality is only available to Summit and NUMAQ. It will work on other platforms, but they do not need it.
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- 23 Feb, 2003 1 commit
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Dominik Brodowski authored
Move x86 CPU_FREQ config choices to extra file & menu. (Marc-Christian Petersen)
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- 18 Feb, 2003 1 commit
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Andrew Morton authored
Patch from Andrey Panin <pazke@orbita1.ru> And finally, attached patch enables visws subarch support in kernel config.
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- 15 Feb, 2003 2 commits
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Dominik Brodowski authored
The deprecated /proc/cpufreq interface can easily live outside the cpufreq core now.
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Dominik Brodowski authored
The CPU frequency table helpers can easily be modularized -- especially as they are not needed on all architectures, or for all drivers (even on x86 -- see longrun and gx-suspmod)
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- 13 Feb, 2003 2 commits
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Dave Jones authored
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Dave Jones authored
The new C3s won't boot a C3 kernel as they dropped 3dnow support in favour of SSE. It now also has cmov though and can be scheduled as a 686 CPU. I've a patch for gcc pending inclusion that adds the -march=c3-2 option.
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- 09 Feb, 2003 1 commit
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Rusty Russell authored
From: GertJan Spoelman <kl@gjs.cc> OK, here is a new patch, I edited the old patch and took out the .ko's so now the extension is trimmed instead.
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- 20 Jan, 2003 1 commit
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Andy Grover authored
(Dominik Brodowski)
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- 16 Jan, 2003 1 commit
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Marc Zyngier authored
Base patch adding sysfs support for the EISA bus
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- 13 Jan, 2003 4 commits
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Venkatesh Pallipadi authored
Clustered APIC setup patch. Needed to support generic systems with more than 8 CPUs. Motivation: The current APIC destination mode ("Flat Logical") used in linux kernel has an upper limit of 8 CPUs. For more than 8 CPUs, either "Clustered Logical" or "Physical" mode has to be used. The attached patch adds support such systems by organizing them into logical clusters, with each cluster having 4 CPUs. This is activated by a new config option "Support for other sub-arch SMP systems with more than 8 CPUs", under Processor feature->Sub architecture. The patch is made very simple and isolated, thanks to Martin J. Bligh's patchsets, which has moved all APIC related functions into sub-arch macros. Has zero impact on standard systems. This patch enables all 16 logical processors on a generic, non-quad based, system that we have here. Also, by looking at SuSE source, I have also added a special switch, to specifically support Unisys (ES7000). Just replacing #define SEQUENTIAL_APICID by CLUSTERED_APICID in the patch should make it work on ES7000(not tested).
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Dominik Brodowski authored
This patch by Hiroshi Miura adds a cpufreq driver for Cyrix MediaGX and National Semiconductor Geode processors using "Suspend Modulation". It's partly based on Zwane Mwaikambo's work.
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Dominik Brodowski authored
This patch adds a sysfs interface to the cpufreq core, and marks the previous /proc/cpufreq interface as deprecated. As in drivers/base/cpu.c a "CPU driver" is registered, cpufreq acts as "interface" to this, offering the following files for each CPU (in /system/devices/sys/cpu.../) where CPUfreq support is present cpuinfo_min_freq (ro) - minimum frequency (in kHz) the CPU supports cpuinfo_max_freq (ro) - maximum frequency (in kHz) the CPU supports scaling_min_freq (rw) - minimum frequency (in kHz) cpufreq may scale the CPU core to scaling_max_freq (rw) - maximum frequency (in kHz) cpufreq may scale the CPU core to scaling_governor (rw) - governor == "A feedback device on a machine or engine that is used to provide automatic control, as of speed, pressure, or temperature" [1, as noted by David Kimdon]. Decides what frequency is used. Currently, only "performance" and "powersave" are supported, more may be added later. (In future, a file scaling_driver (ro) which shows what CPUfreq driver is used (arm-sa1100, gx-suspmod, speedstep, longrun, powernow-k6, ...) might be added, and this driver will be allowed to add files scaling_driver_* for driver-specific settings like "prefer fast FSB". And scaling_governor_* files might offer settings for the governor.) To implement this sysfs interface, the driver model "interface" code is used. Unfortunately, it has a non-trivial locking bug in drivers/base/intf.c: there's a down_write call for cls->subsys.rwsem in add_intf(), which then calls add(), which may call intf->add_device(), which may call interface_add_data(), which calls kobject_register(), which calls kobject_add(), which then tries to down_write cls->subsys.rwsem. Remember, that was already locked writable in add_intf(). Because of that, interface_add_data() is commented out; this means that no link in /system/class/cpu/cpufreq is added, and that the dev-removal code isn't called. This shouldn't be a problem yet, though; as no cpufreq driver I know of is capable of CPU hotplugging. Dominik [1] http://dictionary.reference.com/search?q=governor
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Robert Love authored
As you mentioned, we do not correctly identify the P4-based Celeron in the kernel configuration help. Unfortunately, Intel has called all Celeron products simply "Celeron", so we call these "P4-based Celerons".
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- 12 Jan, 2003 1 commit
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Robert Love authored
This separates the "PPro/Celeron/Pentium-II" compile option into "PPro" and "Pentium-II/Celeron" options. This allows us to explicitly support the Pentium II and Celeron, specifically adding the `-march' option for the chip and enabling the unaligned copy optimizations. PPro support remains unchanged. This patch is by Luuk van der Duim with some changes by me (primarily to also support the pre-Coppermine Celeron chips, since those use Pentium II cores). This patch has been in 2.5-mm for awhile and Andrew ack'ed this submission.
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- 08 Jan, 2003 2 commits
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Dave Jones authored
Since we killed off the broken 486 strings copies, the config item isn't needed any longer.
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Dave Jones authored
Fix incorrect CONFIG_ name
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- 07 Jan, 2003 1 commit
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Martin J. Bligh authored
OK, the grand finale ... NUMA-Q is now moved into subarch, so we can kill off the last vestiges - CONFIG_CLUSTERED_APIC, clustered_apic_mode, and smpboot.h (which only contains machine specific stuff now anyway). the esr_disable switch was the last bit, that goes to subarch too. If you end up with an empty smpboot.h due to patch / bitkeeper interactions, please remove it after this ...
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- 02 Jan, 2003 1 commit
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Tomas Szepe authored
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- 30 Dec, 2002 2 commits
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Linus Torvalds authored
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Christoph Hellwig authored
The name is just a bit too generic, and we already use the _X86 prefix for lots of other stuff in that area. Dito for the never use CONFIG_PC and CONFIG_VISWS.
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- 29 Dec, 2002 3 commits
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Christoph Hellwig authored
shorter and/or more descriptive choice names, add a full (tho still commented out entry) for the visw, based on the 2.4 Configure.help entry.
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Linus Torvalds authored
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Christoph Hellwig authored
It's only used to hide two entries in arch/i386/Kconfig.
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- 28 Dec, 2002 5 commits
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Linus Torvalds authored
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James Bottomley authored
Also localises the parameters and setup into kernel/timers Adds an external flag so that the tsc can be disabled from the machine specific setup (used by voyager)
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James Bottomley authored
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James Bottomley authored
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Andi Kleen authored
Add support for the AMD Opteron/Athlon64/Hammer/K8 line to the 32bit kernel. Mostly just reusing Athlon code with some changed CPU model checks. The Hammer has model number 15. I also fixed rmb()/mb() to use the SSE2 mfence/lfence instructions on P4 and Hammer. They are somewhat cheaper than the locked cycle.
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