- 15 Dec, 2008 27 commits
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Ben Dooks authored
Initial architecture support for the S3C24A0 ARCH_S3C24A0. We don't yet add an kconfig entry in the main arch/arm/Kconfig file as the series is not complete, so that is left until enough support is in to be useful. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Split the map.h definitions into common S3C24XX code by adding arch/arm/plat-s3c24xx/include/plat/map.h and altering the machine specific header for the S3C24A0. As we add a new <plat/map.h> we move the original one in arch/arm/plat-s3c include directory to be called map-base.h to distinguish the two files. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Sandeep Patil authored
Add serial support for S3C24A0, based on current S3C2410 UART driver. It adds necessary new defines in regs-serial.h for S3C24A0 and the code to support this device in drivers/serial/s3c24a0.c Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Add the necessary debug macros for the S3C24A0 to enable kernel debugging, and fix a bug with selecting the wrong default debug implementation from the base include. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Sandeep Patil authored
The definition of S3C24XX_VA_GPIO used S3C2410_PA_GPIO where it should have read S3C24XX_PA_GPIO. Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Sandeep Patil authored
Add initial arch/arm/mach-s3c24a0/include/mach header files for supporting Samsung S3C24A0 SoC. Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
The pwm-scaler0 and pwm-scaler1 clocks have their .id field set to -1 as they are not referenced to any specific device. However, parts of the pwm-clock code used the .id field to identify which scaler clock was being used. Fix the problem by comparing against the pointer to the clock to identify the scalers. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Add the set_rate and round_rate methods for the pwm-scaler clock for use with the time code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
All the s3c24xx gpiolib chips share the same get/set calls and all but one bank shares the same calls for .direction_input and .direction_output methods. Change the initialisation process to use an new call to register the chips that fills in any blank calls with the default values to avoid having to fill them in the structure initialisers. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Add a simple check when registering a clock on whether the clock has already been added to the list. Any attempt to re-register a clock will cause the clock list to be come looped and thus produces silent failures when looking up clocks. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Move pwm-clock.c to arch/arm/plat-s3c to be shared with the S3C64XX implementations. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Move the core clock registration and definitions in arch/arm/plat-s3c24xx/clock.c to arch/arm/plat-s3c to be shared with the S3C64XX implementations. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Move time.c to arch/arm/plat-s3c to be shared with the S3C64XX implementations. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Add a common include file (regs-irqtype.h) for the IRQ trigger control register values S3C2410_EXTINT*. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Move clock.h, cpu.h and devs.h to plat-s3c for use with the s3c64xx support. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Update the clock settings on resume for suspend/resume support so that if the boot loader changes anything or the system's PLL is reset then we return with the correct settings. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
We cannot sleep if we have cpufreq pm enabled during some of the clock operations, so change to use a spinlock to protect the clock system. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Add support for CPU frequency scalling to the S3C24XX serial driver. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Move the PLL calculation code into it's own header file for re-use with the other plat-s3c24xx based systems such as the S3C24A0. Note, we change the name of s3c2410_get_pll to the more generically named s3c24xx_get_pll as well as the related defintions. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Only certain boards need these clocks, and they are not available on some CPUs (such as the S3C24A0) so remove them from arch/arm/plat-s3c24xx/clock.c and into their own file with appropriate Kconfig entries. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
We need to add plat-s3c to the build to get the headers that will go in here once moved from include/asm-arm so we may as well put some useful common s3c code in here to stop the errors generated form having nothing built. The cpu setup is now passed the cpu idcode and the table of supported cpus to s3c_init_cpu() to abstract the cpu identification out of the initial io setup. As well as moving the cpu initialisation code, we move the map of the board specific items up to the calling code as none of the map_io() functions actually do anything other than pass this to iotable_init(). This patch does not rename any of the init functions that will be common to s3c24xx and any other s3c architectures as this can be done at a later date as it will touch all the board support files which use functions such as s3c24xx_init_clocks() and s3c24xx_init_uarts(). Note, the header arch/arm/plat-s3c24xx/include/plat/cpu.h still has functions that are used by both the cpu and board initialisation functions. This means that each board has definitions specific to the cpu support included and the vice-versa. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Add a default header for <mach/io.h> for systems such as the S3C24A0 which do not need any of the complex code that the S3C2410 uses. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
vmalloc.h is common across all the current s3c platforms, so move it to arch/arm/plat-s3c/include/mach to be used for all the targets. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Move <mach/timex.h> to arch/arm/plat-s3c/include/mach/timex.h so it can be the default for all S3C based architectures. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Move the S3C2410 base clock list to arch/arm/plat-s3c24xx as this code is common to the S3C2410, S3C2440 and S3C2442 cpus. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
This is the header file that defines the basic cpu frequency scalling support for the Samsung S3C series of SoC. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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Ben Dooks authored
Add a set of default pin configuration routines for setting up the SPI gpio configuration when using the hardware SPI driver. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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- 13 Dec, 2008 7 commits
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git://git.marvell.com/orionRussell King authored
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Russell King authored
drivers/built-in.o: In function `pci_set_consistent_dma_mask': hid-quirks.c:(.text+0x2664): multiple definition of `pci_set_consistent_dma_mask' drivers/built-in.o: In function `pci_set_dma_mask': hid-quirks.c:(.text+0x42c4): multiple definition of `pci_set_dma_mask' because drivers/pci/pci.c was not seeing the definition disabling these functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hartley Sweeten authored
Include <linux/i2c.h> in all ep93xx platforms. Patch "5311/1: add core support for built in i2c bus" will cause build errors due to the following in arch/arm/mach-ep93xx/include/mach/platform.h: +void ep93xx_register_i2c(struct i2c_board_info *devices, int num); The i2c.h header needs to be included in order to define struct i2c_board_info. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Hartley Sweeten authored
Use EP93XX_*_PHYS_BASE and SZ_* defines in ep93xx platform inits. The following patch changes the flash memory hard-coded resource addresses and MACHINE_START boot_params to EP93XX_*_PHYS_BASE and SZ_* defines to improve readability. Also some minor whitespace cleanup resulting from previous patches. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Jaya Kumar authored
The gpio setup for AM200 specific GPIO pins should be done in the AM200 code rather than in generic gumstix code. Signed-off-by: Jaya Kumar <jayakumar.lkml@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
dma_supported() is supposed to indicate whether the system can support the DMA mask it was passed, which depends on the maximal address which can be returned for DMA allocations. If the mask is smaller than that, we are unable to guarantee that the driver can reliably obtain suitable memory. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Russell King authored
Netwinder was using gpio_xxx names which could clash with the GPIO layer. Add a 'nw_' prefix to ensure that these remain separate. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 11 Dec, 2008 6 commits
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Nicolas Pitre authored
Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Nicolas Pitre authored
Compilation for the Feroceon core should use -mtune=marvell-f. This is available in Code Sourcery's 2008Q3 release at the moment. Otherwise fall back to -mtune-=xscale. Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Ronen Shitrit authored
On newer versions of the RD88F6281 board, the WAN port is connected to its own ethernet port on the CPU, via a separate PHY, whereas on older versions of the board, it is connected to one of the PHYs in the ethernet switch. In the RD8F6281 setup code, detect which version of the board we are running on, and instantiate the ethernet ports and switch driver accordingly. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Ronen Shitrit authored
The 88f6192 and 88f6281 Kirkwood SoCs support two ethernet ports. Add the platform glue that will allow board support files to instantiate the second ethernet port. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
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Matt Palmer authored
The 88F5182 found in the DNS-323 rev B1 (and some other devices, such as the CH3SNAS) require different initialisation of the SATA controller and MPP registers. Tested on a DNS-323 rev B1. Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
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Matt Palmer authored
Based on similar code from the tsx09 series of machines, just rips the MAC address out of flash and stuffs it into the NIC. Tested on a DNS323 rev B1. It's possible (though unlikely) that an A1 will have the MAC in a different location in flash. Signed-off-by: Matt Palmer <mpalmer@hezmatt.org>
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