1. 27 Oct, 2023 3 commits
    • Thomas Gleixner's avatar
      x86/tsc: Defer marking TSC unstable to a worker · bd94d86f
      Thomas Gleixner authored
      Tetsuo reported the following lockdep splat when the TSC synchronization
      fails during CPU hotplug:
      
         tsc: Marking TSC unstable due to check_tsc_sync_source failed
        
         WARNING: inconsistent lock state
         inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage.
         ffffffff8cfa1c78 (watchdog_lock){?.-.}-{2:2}, at: clocksource_watchdog+0x23/0x5a0
         {IN-HARDIRQ-W} state was registered at:
           _raw_spin_lock_irqsave+0x3f/0x60
           clocksource_mark_unstable+0x1b/0x90
           mark_tsc_unstable+0x41/0x50
           check_tsc_sync_source+0x14f/0x180
           sysvec_call_function_single+0x69/0x90
      
         Possible unsafe locking scenario:
           lock(watchdog_lock);
           <Interrupt>
             lock(watchdog_lock);
      
         stack backtrace:
          _raw_spin_lock+0x30/0x40
          clocksource_watchdog+0x23/0x5a0
          run_timer_softirq+0x2a/0x50
          sysvec_apic_timer_interrupt+0x6e/0x90
      
      The reason is the recent conversion of the TSC synchronization function
      during CPU hotplug on the control CPU to a SMP function call. In case
      that the synchronization with the upcoming CPU fails, the TSC has to be
      marked unstable via clocksource_mark_unstable().
      
      clocksource_mark_unstable() acquires 'watchdog_lock', but that lock is
      taken with interrupts enabled in the watchdog timer callback to minimize
      interrupt disabled time. That's obviously a possible deadlock scenario,
      
      Before that change the synchronization function was invoked in thread
      context so this could not happen.
      
      As it is not crucical whether the unstable marking happens slightly
      delayed, defer the call to a worker thread which avoids the lock context
      problem.
      
      Fixes: 9d349d47 ("x86/smpboot: Make TSC synchronization function call based")
      Reported-by: default avatarTetsuo Handa <penguin-kernel@i-love.sakura.ne.jp>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarTetsuo Handa <penguin-kernel@i-love.sakura.ne.jp>
      Cc: stable@vger.kernel.org
      Link: https://lore.kernel.org/r/87zg064ceg.ffs@tglx
      bd94d86f
    • Thomas Gleixner's avatar
      x86/i8259: Skip probing when ACPI/MADT advertises PCAT compatibility · 128b0c97
      Thomas Gleixner authored
      David and a few others reported that on certain newer systems some legacy
      interrupts fail to work correctly.
      
      Debugging revealed that the BIOS of these systems leaves the legacy PIC in
      uninitialized state which makes the PIC detection fail and the kernel
      switches to a dummy implementation.
      
      Unfortunately this fallback causes quite some code to fail as it depends on
      checks for the number of legacy PIC interrupts or the availability of the
      real PIC.
      
      In theory there is no reason to use the PIC on any modern system when
      IO/APIC is available, but the dependencies on the related checks cannot be
      resolved trivially and on short notice. This needs lots of analysis and
      rework.
      
      The PIC detection has been added to avoid quirky checks and force selection
      of the dummy implementation all over the place, especially in VM guest
      scenarios. So it's not an option to revert the relevant commit as that
      would break a lot of other scenarios.
      
      One solution would be to try to initialize the PIC on detection fail and
      retry the detection, but that puts the burden on everything which does not
      have a PIC.
      
      Fortunately the ACPI/MADT table header has a flag field, which advertises
      in bit 0 that the system is PCAT compatible, which means it has a legacy
      8259 PIC.
      
      Evaluate that bit and if set avoid the detection routine and keep the real
      PIC installed, which then gets initialized (for nothing) and makes the rest
      of the code with all the dependencies work again.
      
      Fixes: e179f691 ("x86, irq, pic: Probe for legacy PIC and set legacy_pic appropriately")
      Reported-by: default avatarDavid Lazar <dlazar@gmail.com>
      Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
      Tested-by: default avatarDavid Lazar <dlazar@gmail.com>
      Reviewed-by: default avatarHans de Goede <hdegoede@redhat.com>
      Reviewed-by: default avatarMario Limonciello <mario.limonciello@amd.com>
      Cc: stable@vger.kernel.org
      Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218003
      Link: https://lore.kernel.org/r/875y2u5s8g.ffs@tglx
      128b0c97
    • Tony Luck's avatar
      x86/cpu: Add model number for Intel Arrow Lake mobile processor · b99d70c0
      Tony Luck authored
      For "reasons" Intel has code-named this CPU with a "_H" suffix.
      
      [ dhansen: As usual, apply this and send it upstream quickly to
      	   make it easier for anyone who is doing work that
      	   consumes this. ]
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
      Link: https://lore.kernel.org/all/20231025202513.12358-1-tony.luck%40intel.com
      b99d70c0
  2. 19 Oct, 2023 32 commits
  3. 18 Oct, 2023 5 commits