- 07 Apr, 2009 40 commits
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Serge E. Hallyn authored
Largely inspired from ipc/ipc_sysctl.c. This patch isolates the mqueue sysctl stuff in its own file. [akpm@linux-foundation.org: build fix] Signed-off-by:
Cedric Le Goater <clg@fr.ibm.com> Signed-off-by:
Nadia Derbey <Nadia.Derbey@bull.net> Signed-off-by:
Serge E. Hallyn <serue@us.ibm.com> Cc: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Serge E. Hallyn authored
Implement multiple mounts of the mqueue file system, and link it to usage of CLONE_NEWIPC. Each ipc ns has a corresponding mqueuefs superblock. When a user does clone(CLONE_NEWIPC) or unshare(CLONE_NEWIPC), the unshare will cause an internal mount of a new mqueuefs sb linked to the new ipc ns. When a user does 'mount -t mqueue mqueue /dev/mqueue', he mounts the mqueuefs superblock. Posix message queues can be worked with both through the mq_* system calls (see mq_overview(7)), and through the VFS through the mqueue mount. Any usage of mq_open() and friends will work with the acting task's ipc namespace. Any actions through the VFS will work with the mqueuefs in which the file was created. So if a user doesn't remount mqueuefs after unshare(CLONE_NEWIPC), mq_open("/ab") will not be reflected in "ls /dev/mqueue". If task a mounts mqueue for ipc_ns:1, then clones task b with a new ipcns, ipcns:2, and then task a is the last task in ipc_ns:1 to exit, then (1) ipc_ns:1 will be freed, (2) it's superblock will live on until task b umounts the corresponding mqueuefs, and vfs actions will continue to succeed, but (3) sb->s_fs_info will be NULL for the sb corresponding to the deceased ipc_ns:1. To make this happen, we must protect the ipc reference count when a) a task exits and drops its ipcns->count, since it might be dropping it to 0 and freeing the ipcns b) a task accesses the ipcns through its mqueuefs interface, since it bumps the ipcns refcount and might race with the last task in the ipcns exiting. So the kref is changed to an atomic_t so we can use atomic_dec_and_lock(&ns->count,mq_lock), and every access to the ipcns through ns = mqueuefs_sb->s_fs_info is protected by the same lock. Signed-off-by: -
Serge E. Hallyn authored
Move mqueue vfsmount plus a few tunables into the ipc_namespace struct. The CONFIG_IPC_NS boolean and the ipc_namespace struct will serve both the posix message queue namespaces and the SYSV ipc namespaces. The sysctl code will be fixed separately in patch 3. After just this patch, making a change to posix mqueue tunables always changes the values in the initial ipc namespace. Signed-off-by:
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Serge E. Hallyn authored
The mqueuefs filesystem will use this helper as well. Proc's main get_sb could also be made to use it, but that will require a bit more rework. Signed-off-by:
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Michal Januszewski authored
Update the uvesafb documentation to accurately reflect the default options used by the driver. Signed-off-by:
Michal Januszewski <spock@gentoo.org> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by:
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Guennadi Liakhovetski authored
1. check for errors returned from clk_get() 2. fix "Unbalanced enable for IRQ 160" 3. fix transmit descriptor handling in panning 4. clean frame buffer on blank - useful for OLED displays 5. formatting clean up Signed-off-by:
Guennadi Liakhovetski <lg@denx.de> Cc: Dan Williams <dan.j.williams@intel.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by:
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Krzysztof Helt authored
Read DDC information from a connected monitor and use it to select initial mode (if the mode is not specified). Also, use the information to protect against modes outside the monitor specs. Signed-off-by:
Krzysztof Helt <krzysztof.h1@wp.pl> Tested-by:
Jean Delvare <khali@linux-fr.org> Signed-off-by:
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Krzysztof Helt authored
The I2C functionality provided by the i2c-voodoo3 driver is moved into the tdfxfb (frame buffer driver for Voodoo3 cards). This way there is no conflict between the i2c driver and the fb driver. The tdfxfb does not make use from the DDC functionality yet but provides all the functionality of the i2c-voodoo3 driver. Signed-off-by:
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Masami Hiramatsu authored
Add disable/enable_kretprobe() and disable/enable_jprobe(). Signed-off-by:
Masami Hiramatsu <mhiramat@redhat.com> Acked-by:
Ananth N Mavinakayanahalli <ananth@in.ibm.com> Cc: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Cc: David S. Miller <davem@davemloft.net> Signed-off-by:
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Masami Hiramatsu authored
Add disable_kprobe() and enable_kprobe() to disable/enable kprobes temporarily. disable_kprobe() asynchronously disables probe handlers of specified kprobe. So, after calling it, some handlers can be called at a while. enable_kprobe() enables specified kprobe. aggr_pre_handler and aggr_post_handler check disabled probes. On the other hand aggr_break_handler and aggr_fault_handler don't check it because these handlers will be called while executing pre or post handlers and usually those help error handling. Signed-off-by:
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Masami Hiramatsu authored
Rename kprobe_enabled to kprobes_all_disarmed and invert logic due to avoiding naming confusion from per-probe disabling. Signed-off-by:
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Masami Hiramatsu authored
Fix comment style in kprobes.h. Signed-off-by:
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Masami Hiramatsu authored
Clean up positions of EXPORT_SYMBOL_GPL in kernel/kprobes.c according to checkpatch.pl. Signed-off-by:
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Masami Hiramatsu authored
Currently, kprobes can disable all probes at once, but can't disable it individually (not unregister, just disable an kprobe, because unregistering needs to wait for scheduler synchronization). These patches introduce APIs for on-the-fly per-probe disabling and re-enabling by dis-arming/re-arming its breakpoint instruction. This patch: Change old_p to ap in add_new_kprobe() for readability, copy flags member in add_aggr_kprobe(), and simplify the code flow of register_aggr_kprobe(). Signed-off-by:
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Mike Rapoport authored
Signed-off-by:
Mike Rapoport <mike@compulab.co.il> Cc: Bryan Wu <bryan.wu@analog.com> Cc: David Brownell <david-b@pacbell.net> Signed-off-by:
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Mike Rapoport authored
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Mike Rapoport authored
Some SPI controllers have restrictions on DMAable buffers alignemt. Currently if the buffer supplied by protocol driver is not properly aligned, the controller silently performs transfer in PIO mode. Addition of dma_alignment field to spi_master allows protocol drivers to perform proper alignment. Signed-off-by:
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Mike Rapoport authored
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Eric Miao authored
Most SPI peripherals use GPIOs as their chip selects, introduce .gpio_cs for this. Signed-off-by:
Eric Miao <eric.miao@marvell.com> Cc: David Brownell <david-b@pacbell.net> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by:
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Roel Kluin authored
With a postfix decrement limit will reach -1 rather than 0, so the warning will not be issued. Also, add a cpu_relax() into the busy-wait loop. Signed-off-by:
Roel Kluin <roel.kluin@gmail.com> Cc: Mariusz Ceier <mceier@gmail.com> Acked-by:
David Brownell <dbrownell@users.sourceforge.net> Signed-off-by:
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Wolfgang Muees authored
1. Rewrite of the non-dma data transfer functions to use only ONE mode of TIMOD (TIMOD=0x1). With TIMOD=0, it was not possible to set the TX bit pattern. So the TDBR = 0xFFFF inside the read calls won't work. 2. Clear SPI_RDBR before reading and before duplex transfer. Otherwise the garbage data in RDBR will get read. Since mmc_spi uses a lot of duplex transfers, this is the main cause of mmc_spi failure. 3. Poll RXS for transfer completion. Polling SPIF or TXS cannot guarantee transfer completion. This may interrupt a transfer before it is finished. Also this may leave garbage data in buffer and affect next transfer. [Yi Li <yi.li@analog.com>: add a field "u16 idle_tx_val" in "struct bfin5xx_spi_chip" to specify the value to transmit if no TX value is supplied.] Signed-off-by:
Wolfgang Muees <wolfgang.mues@auerswald.de> Signed-off-by:
Yi Li <yi.li@analog.com> Signed-off-by:
Bryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by:
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Michael Hennerich authored
Add support for GPIO controlled SPI Chip Selects. To make use of this feature, set chip_select = 0 and add a proper cs_gpio to your controller_data. struct spi_board_info .chip_select = 0 struct bfin5xx_spi_chip .cs_gpio = GPIO_P### There are various SPI devices that require SPI MODE_0, and need to have the Chip Selects asserted during the entire transfer. Consider using SPI_MODE_3 (SPI_CPHA | SPI_CPOL) if your device allows it. Signed-off-by:Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
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Mike Frysinger authored
Fix NULL pointer crash when cleaning up from invalid platform resources Signed-off-by:
Mike Frysinger <vapier.adi@gmail.com> Signed-off-by:
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Mike Frysinger authored
Do this because when things crash, we get simple names like "setup" and "start_queue" which is pretty difficult to trace back to the real thing: the spi driver Signed-off-by:
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Yi Li authored
According to comments in linux/spi/spi.h: * All SPI transfers start with the relevant chipselect active. Normally * it stays selected until after the last transfer in a message. Drivers * can affect the chipselect signal using cs_change. * * (i) If the transfer isn't the last one in the message, this flag is * used to make the chipselect briefly go inactive in the middle of the * message. Toggling chipselect in this way may be needed to terminate * a chip command, letting a single spi_message perform all of group of * chip transactions together. * * (ii) When the transfer is the last one in the message, the chip may * stay selected until the next transfer. On multi-device SPI busses * with nothing blocking messages going to other devices, this is just * a performance hint; starting a message to another device deselects * this one. But in other cases, this can be used to ensure correctness. * Some devices need protocol transactions to be built from a series of * spi_message submissions, where the content of one message is determined * by the results of previous messages and where the whole transaction * ends when the chipselect goes intactive. Signed-off-by:
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Yi Li authored
This bug can be observed when two SPI devices are sharing the spi bus: One device is set as SPI CS 7, another one is using SPI CS 4. In spi_bfin5xx.c: cs_active(), cs_deactive() are used to control SPI_FLG register. From the debug bellow: cs_active: flag: 0x7f91, chip->flag: 0x7f80, cs: 7 cs_active: flag: 0xef91, chip->flag: 0xef10, cs: 4 When device A (cs_7) activate CS 7, SPI_FLG is set as 0x7f91 (however, SPI_FLG should be set as 0x7f80, or 0x6f91 if in broadcast mode). Due to some HW bug (very possibly), if SPI_FLG is set as 0x7f91, SPISSEL7 is asserted, however SPISSEL4 will be asserted too (I can see this using the scope). This is unreasonable according to HRM. Signed-off-by:
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Mike Frysinger authored
Without this change, SPI DMA is not reliably under stress tests. Obiviously it's a hardware issue which is not addressed by any document. Signed-off-by:
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Mike Frysinger authored
The "while" endless loop will cause the system hang if hardware error, so we add timeout control to make the system alive. Signed-off-by:
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Mike Frysinger authored
When using a BF533-STAMP here with a W25X10 SPI flash. It works fine when enable_dma is disabled, but doesn't work at all when turning DMA on. We get just 0xff bytes back when trying to read the device. Change the code around so that it programs the SPI first and then enables DMA, it seems to work a lot better ... Signed-off-by:
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Mike Frysinger authored
- remove duplicated definition MAX_SPI_SSEL - remove unnecessary array size Signed-off-by:
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Mike Frysinger authored
use the properl BIT_CTL_... defines rather than the internal driv er CFG_SPI_... defines Signed-off-by:
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Mike Frysinger authored
We only need to check SPI error when DMA failes, cause that is the DMA IRQ handling routine. Signed-off-by:
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Mike Frysinger authored
Because of DMA hardware issue, we were trying to use software workaround. This patch add some useful debug messages to help us debugging the DMA code. Signed-off-by:
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Mike Frysinger authored
Blackfin's related DMA callback API doesn't need void * cast, so drop it. And this driver is for all Blackfin processors not only for BF53x, we update the DMA request label for more meaningful information. Signed-off-by:
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Mike Frysinger authored
For DMA TX/RX operation in pump_transfers, DMA contriguration code in TX and RX paths are almost the same. This patch unify the duplicated DMA code to make it more readable. Signed-off-by:
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Mike Frysinger authored
If the SPI bus registers a receive overflow error, pass the result back up to the higher levels. Signed-off-by:
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Mike Frysinger authored
Use len_in_bytes when we care about the number of bytes transferred rather than the number of spi transactions. (this value will be the same for 8bit transfers, but not any other sizes) Signed-off-by:
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Mike Frysinger authored
We already moved bfin_addr_dcachable() and friends into the cacheflush header where it belongs, so don't need to include <asm/cplbinit.h> here. Signed-off-by:
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Michael Hennerich authored
Fix erroneous SPI Clock divisor calculation. Make sure SPI_BAUD is always >= 2. Writing a value of 0 or 1 to the SPI_BAUD register disables the serial clock. Signed-off-by:
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Vitja Makarov authored
Flush or invalidate caches before doing DMA transfer, if needed. [Mike Frysinger <vapier.adi@gmail.com>: add comment to address the issue "Full duplex only works for non-DMA transfers".] Signed-off-by:
Vitja Makarov <vitja.makarov@gmail.com> Signed-off-by:
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