1. 21 Aug, 2013 1 commit
    • Scott Wood's avatar
      powerpc: Convert some mftb/mftbu into mfspr · beb2dc0a
      Scott Wood authored
      Some CPUs (such as e500v1/v2) don't implement mftb and will take a
      trap.  mfspr should work on everything that has a timebase, and is the
      preferred instruction according to ISA v2.06.
      
      Currently we get away with mftb on 85xx because the assembler converts
      it to mfspr due to -Wa,-me500.  However, that flag has other effects
      that are undesireable for certain targets (e.g.  lwsync is converted to
      sync), and is hostile to multiplatform kernels.  Thus we would like to
      stop setting it for all e500-family builds.
      
      mftb/mftbu instances which are in 85xx code or common code are
      converted.  Instances which will never run on 85xx are left alone.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      beb2dc0a
  2. 20 Aug, 2013 1 commit
    • Scott Wood's avatar
      powerpc/fsl-booke: Work around erratum A-006958 · d52459ca
      Scott Wood authored
      Erratum A-006598 says that 64-bit mftb is not atomic -- it's subject
      to a similar race condition as doing mftbu/mftbl on 32-bit.  The lower
      half of timebase is updated before the upper half; thus, we can share
      the workaround for a similar bug on Cell.  This workaround involves
      looping if the lower half of timebase is zero, thus avoiding the need
      for a scratch register (other than CR0).  This workaround must be
      avoided when the timebase is frozen, such as during the timebase sync
      code.
      
      This deals with kernel and vdso accesses, but other userspace accesses
      will of course need to be fixed elsewhere.
      Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
      d52459ca
  3. 16 Aug, 2013 1 commit
  4. 14 Aug, 2013 37 commits