- 03 Jul, 2022 40 commits
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Krzysztof Kozlowski authored
According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607171848.535128-8-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Add common LED properties - the function and color - to LED nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-10-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Add common LED property - the function - to LED node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-9-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Add common LED property - the function - to LED node. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-8-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Add common LED properties - the function and color - to LED nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-7-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Add common LED properties - the function and color - to LED nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220607102931.102805-6-krzysztof.kozlowski@linaro.org
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Vinod Koul authored
The soc node expects all the nodes to have unit addresses. The qup-opp-table does not have that which causes warnings: arch/arm64/boot/dts/qcom/sm8250.dtsi:916.32-933.5: Warning (simple_bus_reg): /soc@0/qup-opp-table: missing or empty reg/ranges property Move the qup-opp-table out of soc node to fix these warnings Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bjorn: Rebased ontop of Krzysztof's node name update] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220606065035.553533-4-vkoul@kernel.org
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Vinod Koul authored
The soc node expects all the nodes to have unit addresses. The qup-opp-tables do not have that which causes warnings: arch/arm64/boot/dts/qcom/sm8350.dtsi:640.46-657.5: Warning (simple_bus_reg): /soc@0/qup-100mhz-opp-table: missing or empty reg/ranges property arch/arm64/boot/dts/qcom/sm8350.dtsi:659.46-676.5: Warning (simple_bus_reg): /soc@0/qup-120mhz-opp-table: missing or empty reg/ranges property Move the qup-opp-tables out of soc node to fix these warnings Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> [bjorn: Rebased ontop of Krzysztof's node name update] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220606065035.553533-3-vkoul@kernel.org
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Vinod Koul authored
clk-virt and mc-virt interconnect nodes were named interconnect@0 and interconnect@1. That is incorrect as we don't have unit addresses 0/1 for these node. This causes warning: arch/arm64/boot/dts/qcom/sm8450.dtsi:255.27-259.4: Warning (unit_address_vs_reg): /interconnect@0: node has a unit name, but no reg or ranges property arch/arm64/boot/dts/qcom/sm8450.dtsi:261.26-265.4: Warning (unit_address_vs_reg): /interconnect@1: node has a unit name, but no reg or ranges property arch/arm64/boot/dts/qcom/sm8450.dtsi:255.27-259.4: Warning (unique_unit_address_if_enabled): /interconnect@0: duplicate unit-address (also used in node /soc@0) Rename the nodes to interconnect-0 and interconnect-1 to fix the warning. Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220606065035.553533-2-vkoul@kernel.org
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Alec Su authored
Add the device tree for Xiaomi Mi 5s Plus (natrium). Signed-off-by: Alec Su <ae40515@yahoo.com.tw> Reviewed-by: Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220606024706.22861-3-ae40515@yahoo.com.tw
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Alec Su authored
Document Xiaomi Mi 5s Plus (xiaomi-natrium) smartphone which is based on Snapdragon 821 SoC. Signed-off-by: Alec Su <ae40515@yahoo.com.tw> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220606024706.22861-2-ae40515@yahoo.com.tw
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Robert Marko authored
Current QUP peripheral labels like spi_0 and i2c_0 dont really tell what is the exact QUP HW being used as there are actually 6 identical QUP HW blocks for UART, SPI and I2C. For example current i2c_0 label actually points to the QUP2 I2C HW. This style of labeling does not follow what the rest of Qualcomm SoC-s use, for example IPQ8074 which has the identical QUP blocks. It also makes it really hard to add the missing QUP DT nodes as there are multiple missing. So utilize the same style as other Qualcomm SoC-s are using and update the CP01 DTS as its the current sole user of them. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220604153003.55172-1-robimarko@gmail.com
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Luca Weiss authored
The use of these constants was removed during merging, probably because the patches adding those defines and the dts patches were merged through different trees. Re-add them to make it clear which clocks are getting used. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220603094710.64591-2-luca.weiss@fairphone.com
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Luca Weiss authored
Make it easier to understand what the reg in those nodes is by using the constants provided by qcom,q6dsp-lpass-ports.h. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220603094710.64591-1-luca.weiss@fairphone.com
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Manivannan Sadhasivam authored
The watchdog IRQ trigger type should be EDGE_RISING. So fix all remoteproc nodes. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220530080842.37024-3-manivannan.sadhasivam@linaro.org
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Sireesh Kodali authored
The smem-state properties for the pronto node were incorrectly labelled, reading `qcom,state*` rather than `qcom,smem-state*`. Fix that, allowing the stop state to be used. Fixes: 88106096 ("ARM: dts: msm8916: Add and enable wcnss node") Signed-off-by: Sireesh Kodali <sireeshkodali1@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526141740.15834-3-sireeshkodali1@gmail.com
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Markuss Broks authored
This patch adds device tree support for the VL53L0X ToF sensor found on all Yoshino devices. Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220523175344.5845-6-markuss.broks@gmail.com
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Sibi Sankar authored
Add interconnects that are required to be proxy voted upon during modem bootup on SC7280 SoCs. Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1652978825-5304-2-git-send-email-quic_sibis@quicinc.com
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Krzysztof Kozlowski authored
Specifying interrupts and interrupts-extended is not correct. Keep only the extended ones, routed towards IPCC mailbox to fix warnings like: sm8450-qrd.dtb: glink-edge: More than one condition true in oneOf schema: {'$filename': 'Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml', Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517070113.18023-13-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Specifying interrupts and interrupts-extended is not correct. Keep only the extended ones, routed towards IPCC mailbox to fix warnings like: sm8350-sony-xperia-sagami-pdx214.dtb: glink-edge: More than one condition true in oneOf schema: {'$filename': 'Documentation/devicetree/bindings/remoteproc/qcom,glink-edge.yaml', Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517070113.18023-12-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
glink-edge node does not have children with unit addresses: sdm630-sony-xperia-ganges-kirin.dtb: glink-edge: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517070113.18023-11-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
glink-edge bindings require label: ipq6018-cp01-c1.dtb: glink-edge: 'label' is a required property Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220517070113.18023-10-krzysztof.kozlowski@linaro.org
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Bhupesh Sharma authored
As Bjorn noted in [1], since the qmp phy driver doesn't use the 'vdda-max-microamp' & 'vdda-pll-max-microamp' properties currently, let's remove them from the dts files as well. Otherwise, it leads to the following '$ make dtbs_check' warning(s): sm8350-microsoft-surface-duo2.dt.yaml: phy@1d87000: 'vdda-max-microamp', 'vdda-pll-max-microamp' do not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+ If later on the driver support is added, we can add these properties back to the dts files. [1]. https://lore.kernel.org/linux-arm-msm/YmQhpsmiYJzR99LK@ripper/ Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Vinod Koul <vkoul@kernel.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220516063155.1332683-5-bhupesh.sharma@linaro.org
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Robert Marko authored
Add USB power domains provided by GCC GDSCs. Add the required #power-domain-cells to the GCC as well. Signed-off-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220515210048.483898-11-robimarko@gmail.com
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Bjorn Andersson authored
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'reg-names' as various possible combinations are possible for different qcom SoC dts files. Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-6-bhupesh.sharma@linaro.org
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports a number of issues with ordering of 'clocks' & 'clock-names' for sdhci nodes: arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:0: 'iface' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:1: 'core' was expected arch/arm64/boot/dts/qcom/ipq8074-hk10-c2.dtb: sdhci@7824900: clock-names:2: 'xo' was expected Fix the same by updating the offending 'dts' files. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-5-bhupesh.sharma@linaro.org
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'interconnect-names' used for sdhci nodes. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-3-bhupesh.sharma@linaro.org
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Bhupesh Sharma authored
Since the Qualcomm sdhci-msm device-tree binding has been converted to yaml format, 'make dtbs_check' reports issues with inconsistent 'sdhci@' convention used for specifying the sdhci nodes. The generic mmc bindings expect 'mmc@' format instead. Fix the same. Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> [bjorn: Moved non-arm64 changes to separate commit] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220514215424.1007718-2-bhupesh.sharma@linaro.org
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Marijn Suijten authored
The entire Sony Nile and Ganges lineup utilize the first three channels (the triled channels) of the LPG block for an RGB (battery) status and notification indicator. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> [bjorn: Dropped #address/#size-cells] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220511190718.764445-4-marijn.suijten@somainline.org
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Marijn Suijten authored
The Light Pulse Generator describes a hardware block responsible for displaying colors and patterns on an RGB LED (usually used for [battery] status and notifications), and drive PWM signals for general-purpose (ie. backlight) LEDs. The availability and usage of the individual channels differ per board and is hence left for individual platform DTs to configure. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> [bjorn: Dropped #address/size-cells] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220511190718.764445-3-marijn.suijten@somainline.org
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Andrey Konovalov authored
The current settings refer to "blsp_spi1" function which isn't defined. For this reason an attempt to enable blsp1_spi1 interface results in the probe failure below: [ 3.492900] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.502460] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.517725] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.532998] qcs404-pinctrl 1000000.pinctrl: invalid function blsp_spi1 in map table [ 3.548277] spi_qup: probe of 78b6000.spi failed with error -22 Fix this by making the functions used in qcs404.dtsi to match the contents of drivers/pinctrl/qcom/pinctrl-qcs404.c. Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220611195713.131597-1-andrey.konovalov@linaro.org
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Dmitry Baryshkov authored
Qualcomm RB5 platform uses Light Pulse Generator tri-led block to drive three green leds. Add device nodes defining those leds. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505145102.1432670-4-dmitry.baryshkov@linaro.org
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Dmitry Baryshkov authored
Add device node defining LPG/PWM block on PM8150L PMIC chip. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505145102.1432670-3-dmitry.baryshkov@linaro.org
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Dmitry Baryshkov authored
Add device node defining LPG/PWM block on PM8150B PMIC chip. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220505145102.1432670-2-dmitry.baryshkov@linaro.org
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Krzysztof Kozlowski authored
The node names should be generic and DT schema expects certain pattern with 'led'. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-24-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Nodes do not need explicit status=okay. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-23-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
gpio-keys children do not use unit addresses. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-22-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-21-krzysztof.kozlowski@linaro.org
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Krzysztof Kozlowski authored
Fix whitespace coding style: use single space instead of tabs or multiple spaces around '=' sign in property assignment. No functional changes (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220526204248.832139-1-krzysztof.kozlowski@linaro.org
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