- 12 Jul, 2023 3 commits
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Philip Yang authored
Retry faults are delegated to soft IH ring and then processed by deferred worker. Current soft IH ring size PAGE_SIZE can store 128 entries, which may overflow and drop retry faults, causes HW stucks because the retry fault is not recovered. Increase soft IH ring size to 8KB, enough to store 256 CAM entries because we clear the CAM entry after handling the retry fault from soft ring. Define macro IH_RING_SIZE and IH_SW_RING_SIZE to remove duplicate constant. Show warning message if soft IH ring overflows with CAM enabled because this should not happen. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
rlc_init() is part of sw_init() so it should not touch hardware. Additionally, calling the rlc update_spm_vmid() callback directly invokes a gfx on/off cycle which could result in powergating being enabled before hw init is complete. Split update_spm_vmid() into an internal implementation for local use without gfxoff interaction and then the rlc callback which includes gfxoff handling. Acked-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Alex Deucher authored
rlc_init() is part of sw_init() so it should not touch hardware. Additionally, calling the rlc update_spm_vmid() callback directly invokes a gfx on/off cycle which could result in powergating being enabled before hw init is complete. Split update_spm_vmid() into an internal implementation for local use without gfxoff interaction and then the rlc callback which includes gfxoff handling. lbpw_init also touches hardware so mvoe that to rlc_resume as well. Acked-by:
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- 10 Jul, 2023 18 commits
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Srinivasan Shanmugam authored
Fix the below checkpatch errors & warnings: ERROR: that open brace { should be on the previous line ERROR: space prohibited before that ',' (ctx:WxV) ERROR: space required after that ',' (ctx:WxV) ERROR: code indent should use tabs where possible ERROR: switch and case should be at the same indent WARNING: please, no spaces at the start of a line WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: space prohibited before semicolon WARNING: Block comments use a trailing */ on a separate line WARNING: Block comments use * on subsequent lines WARNING: braces {} are not necessary for any arm of this statement WARNING: Missing a blank line after declarations Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Acked-by:
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Srinivasan Shanmugam authored
Fix the below checkpatch warnings: WARNING: static const char * array should probably be static const char * const +static const char *gfxhub_client_ids[] = { WARNING: Prefer 'unsigned int' to bare use of 'unsigned' + unsigned i; WARNING: static const char * array should probably be static const char * const +static const char *gfxhub_client_ids[] = { WARNING: Prefer 'unsigned int' to bare use of 'unsigned' + unsigned i; Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Srinivasan Shanmugam authored
Fix below checkpatch warnings: WARNING: braces {} are not necessary for single statement blocks WARNING: braces {} are not necessary for any arm of this statement WARNING: Block comments should align the * on each line Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
gaba authored
In restore process worker, pinned BO cause update PTE fail, then the function re-schedule the restore_work. This will generate dead loop. Signed-off-by:
gaba <gaba@amd.com> Reviewed-by:
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Yang Wang authored
v1: the dceflck sysnode is not aviable on GFX v9.4.3 chip. v2: simplify code logic using helper function: amdgpu_device_has_display_hardware(). Signed-off-by:
Yang Wang <kevinyang.wang@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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Guchun Chen authored
Due to a coding typo. Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
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Srinivasan Shanmugam authored
Fix below checkpatch warnings: WARNING: else is not generally useful after a break or return + return true; + } else { WARNING: else is not generally useful after a break or return + return true; + } else { Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Yang Wang authored
the smu driver_table is used for all types of smu tables data transcation (e.g: PPtable, Metrics, i2c, Ecc..). it is necessary to hold this lock to avoiding data tampering during the i2c read operation. Signed-off-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix below checkpatch warnings: WARNING: quoted string split across lines WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: void function return statements are not generally useful WARNING: braces {} are not necessary for any arm of this statement Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Srinivasan Shanmugam authored
Fix below checkpatch warnings: WARNING: else is not generally useful after a break or return + return true; + } else { Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Srinivasan Shanmugam authored
Fix the below checkpatch warnings: WARNING: static const char * array should probably be static const char * const +static const char *gfxhub_client_ids[] = { WARNING: Prefer 'unsigned int' to bare use of 'unsigned' + unsigned i; WARNING: Missing a blank line after declarations + int i; + adev->gmc.VM_L2_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_CNTL); WARNING: Missing a blank line after declarations + int i; + WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL, adev->gmc.VM_L2_CNTL); WARNING: braces {} are not necessary for single statement blocks + if (!time) { + DRM_WARN("failed to wait for GRBM(EA) idle\n"); + } Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Srinivasan Shanmugam authored
Fix below checkpatch errors & warnings: ERROR: trailing statements should be on next line + default: BUG(); ERROR: trailing statements should be on next line WARNING: braces {} are not necessary for single statement blocks WARNING: braces {} are not necessary for any arm of this statement WARNING: Block comments use * on subsequent lines WARNING: Missing a blank line after declarations WARNING: Prefer 'unsigned int' to bare use of 'unsigned' Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Srinivasan Shanmugam authored
Fix below checkpatch warnings: WARNING: Consider removing the code enclosed by this #if 0 and its #endif WARNING: Prefer 'unsigned int' to bare use of 'unsigned' WARNING: quoted string split across lines Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix the below warning: WARNING: Prefer [subsystem eg: netdev]_warn([subsystem]dev, ... then dev_warn(dev, ... then pr_warn(... to printk(KERN_WARNING ... Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix the below checkpatch warnings: WARNING: static const char * array should probably be static const char * const +static const char *gfxhub_client_ids[] = { WARNING: Prefer 'unsigned int' to bare use of 'unsigned' + unsigned i; WARNING: Missing a blank line after declarations + u32 tmp; + tmp = RREG32_SOC15(GC, 0, mmGCVM_L2_PROTECTION_FAULT_CNTL); Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Lijo Lazar authored
Programming of XCC id is already taken care with partition mode change. Signed-off-by:
Le Ma <le.ma@amd.com> Reviewed-by:
Asad Kamal <asad.kamal@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix the below checkpatch warnings: WARNING: Block comments should align the * on each line + /* + * Raven2 has a HW issue that it is unable to use the WARNING: Prefer 'unsigned int' to bare use of 'unsigned' + unsigned num_level, block_size; WARNING: Prefer 'unsigned int' to bare use of 'unsigned' + unsigned i; WARNING: Missing a blank line after declarations + u32 tmp; + tmp = RREG32_SOC15(GC, 0, mmVM_L2_PROTECTION_FAULT_CNTL); WARNING: Block comments should align the * on each line + /* + * Raven2 has a HW issue that it is unable to use the WARNING: Prefer 'unsigned int' to bare use of 'unsigned' + unsigned num_level, block_size; Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by:
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Wesley Chalmers authored
[WHY] It is possible to commit state multiple times in rapid succession with FAMS enabled; if each of these commits were to set optimized_required, then the user may see latency. [HOW] fw_based_mclk_switching is currently not used in dc->clk_mgr; use it to track whether the current state has FAMS enabled; if it has, then do not disable FAMS in prepare_bandwidth, and do not set optimized_required. Reviewed-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by:
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- 07 Jul, 2023 19 commits
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Wesley Chalmers authored
[WHY] Writing to DRR registers such as OTG_V_TOTAL_MIN on the same frame as a pipe commit can cause underflow. [HOW] Move DMUB p-state delegate into optimze_bandwidth; enabling FAMS sets optimized_required. This change expects that Freesync requests are blocked when optimized_required is true. Fixes: 613a7956 ("drm/amd/display: Add monitor specific edid quirk") Reviewed-by:
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Srinivasan Shanmugam authored
Fix below checkpatch error & warnings: ERROR: that open brace { should be on the previous line WARNING: static const char * array should probably be static const char * const WARNING: Block comments use * on subsequent lines WARNING: Block comments use a trailing */ on a separate line Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: -
Lijo Lazar authored
Change the settings applicable for A0. GRBM_MCM_ADDR setting will be applied by firmware. Signed-off-by:
Mangesh Gadre <Mangesh.Gadre@amd.com> Tested-by:
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Philip Yang authored
If the SVM range has no GPU access nor access-in-place attribute, validate and map to GPU should skip the range. Add NULL pointer check if find_first_bit(ctx->bitmap, MAX_GPU_INSTANCE) returns MAX_GPU_INSTANCE as gpuidx if ctx->bitmap is empty. Signed-off-by:
Alex Sierra <alex.sierra@amd.com> Signed-off-by:
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Sreekant Somasekharan authored
Include kgd_gfx_v9_get_cu_occupancy call inside kfd2kgd_calls for GFX9.4.3 to expose cu_occupancy sysfs file. Signed-off-by:
Sreekant Somasekharan <sreekant.somasekharan@amd.com> Acked-by:
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Xiaogang Chen authored
When kfd uses cpu to update vm iterates all current PDs/PTs bos, adds AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED flag and kmap them to kernel virtual address space before kfd updates the vm that was created by gfx. Signed-off-by:
Xiaogang Chen <Xiaogang.Chen@amd.com> Reviewed-by:
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Mukul Joshi authored
Currently, we unmap HIQ by directly writing to HQD registers. This doesn't work for GFX9.4.3. Instead, use KIQ to unmap HIQ, similar to how we use KIQ to map HIQ. Using KIQ to unmap HIQ works for all GFX series post GFXv9. Signed-off-by:
Mukul Joshi <mukul.joshi@amd.com> Reviewed-by:
Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fix the following warnings reported by checkpatch: WARNING: Missing a blank line after declarations WARNING: Prefer 'unsigned int' to bare use of 'unsigned' Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fixes the following category of checkpatch complaints: WARNING: unnecessary cast may hide bugs, see http://c-faq.com/malloc/mallocnocast.html + char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL); Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
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Srinivasan Shanmugam authored
Fixes the following category of checkpatch warning: WARNING: Block comments use a trailing */ on a separate line + * non-boosted one. */ WARNING: suspect code indent for conditional statements (8, 24) + if ((adev->asic_type >= CHIP_POLARIS10) && [...] + return true; Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Cc: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by:
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Tao Zhou authored
The address parameter of GFX RAS injection isn't related to XGMI node number, keep it unchanged. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Candice Li <candice.li@amd.com> Signed-off-by:
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Mukul Joshi authored
Update the invalid PTE flag setting with TF enabled. This is to ensure, in addition to transitioning the retry fault to a no-retry fault, it also causes the wavefront to enter the trap handler. With the current setting, the fault only transitions to a no-retry fault. Additionally, have 2 sets of invalid PTE settings, one for TF enabled, the other for TF disabled. The setting with TF disabled, doesn't work with TF enabled. Signed-off-by:
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Alex Deucher authored
Should only be an issue for bring up when the function pointer is not set, but check it anyway to be safe. Reviewed-by:
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Ramesh Errabolu authored
Directly invoking the function amdgpu_gem_prime_export() from within KFD is not correct. By utilizing the KFD API to obtain Dmabuf, the implementation can prevent the creation of multiple instances of struct dma_buf. Signed-off-by:
Ramesh Errabolu <Ramesh.Errabolu@amd.com> Reviewed-by:
David Francis <David.Francis@amd.com> Signed-off-by:
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Mario Limonciello authored
Adjust the whitespace to be consistent with the rest of the `struct psp_context` structure. Signed-off-by:
Mario Limonciello <mario.limonciello@amd.com> Reviewed-by:
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Mario Limonciello authored
Rather than evaluating the IP version for visibility, evaluate it at the same time as the IP is initialized. Suggested-by:
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Mario Limonciello authored
The flashing process for dGPUs uses sysfs files in a non-obvious way, so document it for users. Signed-off-by:
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Mario Limonciello authored
Rather than special casing the creation of the file, special case the visibility to the supported dGPUs. Signed-off-by:
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Mario Limonciello authored
Debug messages related to the kernel process of flashing an updated IFWI are needlessly noisy and also confusing. Downgrade them to debug instead and clarify what they are actually doing. Signed-off-by:
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