- 29 Dec, 2022 1 commit
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Marijn Suijten authored
According to generic rules the SoC name should be first: arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dtb: clock-controller@5f00000: compatible: 'oneOf' conditional failed, one must be fixed: 'qcom,dispcc-sm6125' does not match '^qcom,(apq|ipq|mdm|msm|qcm|qcs|sa|sc|sdm|sdx|sm)[0-9]+-.*$' And this is already reflected by the bindings submitted prior to the addition of this driver. Any DTS following these rules will end up with a non-probing driver because of this mismatch. Fixes: 6e87c8f0 ("clk: qcom: Add display clock controller driver for SM6125") Signed-off-by:Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221222210140.278077-1-marijn.suijten@somainline.org
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- 28 Dec, 2022 22 commits
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Konrad Dybcio authored
Add support for the camera clock controller found on SM6350. Signed-off-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by:
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Konrad Dybcio authored
Add device tree bindings for camera clock controller for Qualcomm Technology Inc's SM6350 SoC. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Now that all clocks have individual names, remove the names of SoCs from the SMD RPM clock definitions. Replace it with the common clk_smd_rpm_ prefix. Reviewed-by:
Alex Elder <elder@linaro.org> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Add special macro for the clocks of QCOM_SMD_RPM_BUS_CLK type. Use it to insert the _bus_N part into the clock symbol name. The system (and userspace) name of these clocks remains intact. Reviewed-by:
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Dmitry Baryshkov authored
Rename the qcm2290_rf_clk3 clocks adding 38m4 prefix to distinguish it from the common (19.2 MHz) rf_clk3. The system (and userspace) name of these clocks remains intact. Reviewed-by:
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Dmitry Baryshkov authored
To ease distinguishing between branch and non-branch clocks (e.g. aggre1_noc, aggre2_noc and qdss) add '_branch' to all SMD_RPM_BRANCH* clocks. The system (and userspace) name of these clocks remains intact. Reviewed-by:
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Dmitry Baryshkov authored
Remove the duplication between the names of the normal and active-only clocks by moving common sufixes to the clock definition macros. This simplifies adding new clock definitions and reviewing existing defs. Reviewed-by:
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Dmitry Baryshkov authored
Remove the duplication between the names of the normal and active-only XO_BUFFER and XO_BUFFER_PINCTRL clocks by using preprocessor logic to add _a suffix. Reviewed-by:
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Dmitry Baryshkov authored
Rename msm8974_diff_a_clk, msm8974_div_a_clk1 and msm8974_div_a_clk2 to move the _a suffix to the end of the name. This follows the pattern used by other active-only clocks and thus makes it possible to simplify clock definitions. This changes the userspace-visible names for this clocks. Reviewed-by:
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Dmitry Baryshkov authored
To ease review and reuse group all clock definitions together. Reviewed-by:
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Dmitry Baryshkov authored
The commit 52a436e0 ("clk: qcom: smd-rpm: Switch to parent_data") introduced ragged right alignment for the line breaking backslash. Fix it to make the code look consistently. Reviewed-by:
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Dmitry Baryshkov authored
The rpm_status_id field is a leftover from the non-SMD clocks. It is of no use for the SMD-RPM clock driver and is always equal to zero. Drop it completely. Reviewed-by:
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Dmitry Baryshkov authored
For each XO_BUFFER_PINCTRL there is a corresponding XO_BUFFER clock. Add them automatically to drop the duplication between the clock definitions. Reviewed-by:
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Dmitry Baryshkov authored
Reuse sm6125's MMAXI clocks for sm6375. Reviewed-by:
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Dmitry Baryshkov authored
For each of XO_BUFFER_PINCTRL clocks there is a corresponding XO_BUFFER clock with the similar name (e.g. msm8998_ln_bb_clk3_pin vs msm8998_ln_bb_clk3). For qcs404_ln_bb_clk_pin there is no qcs404_ln_bb_clk, since the msm8992_ln_bb_clk was used instead (even for qcs404 platform). Follow the usual practice and rename msm8992_ln_bb_clk clocks to qcs404_ln_bb_clk (and rename active-only clock in a similar way). This is a preparation step for the next patch, which will merge XO_BUFFER and XO_BUFFER_PINCTRL definitions. Reviewed-by:
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Dmitry Baryshkov authored
The qcm2290's ln_bb_clk2 is identical to the freshly added msm8998's ln_bb_clk2 one. Use the latter and drop the SoC-specific version. Reviewed-by:
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Dmitry Baryshkov authored
Newer platforms (msm8998, sdm660, sm6125) have low noise LN_BB_CLKn clocks. The driver already uses proper clock indices (RPM_SMD_LN_BB_CLKn). Fix clock names used by these platforms. Fixes: a0384ecf ("clk: qcom: smd-rpm: De-duplicate identical entries") Fixes: edeb2ca7 ("clk: qcom: smd: Add support for SM6125 rpm clocks") Reviewed-by:
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Dmitry Baryshkov authored
Reuse qcs404's QPIC and BIMC_GPU clock for qcm2290. Fixes: 78b727d0 ("clk: qcom: smd-rpm: Add QCM2290 RPM clock support") Reviewed-by:
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Dmitry Baryshkov authored
The commit 644c4229 ("clk: qcom: smd: Add SM6375 clocks") added a duplicate of the existing define QCOM_SMD_RPM_MMAXI_CLK, drop it now. Fixes: 644c4229 ("clk: qcom: smd: Add SM6375 clocks") Reviewed-by:
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Dmitry Baryshkov authored
The commit eaeee28d ("clk: qcom: smd: Add support for QCS404 rpm clocks") defined the pin-controlled ln_bb_clk clocks, but didn't add them to the qcs404_clks array. Add them to make these clocks usable to platform devices. Fixes: eaeee28d ("clk: qcom: smd: Add support for QCS404 rpm clocks") Reviewed-by: Alex Elder <elder@linaro.org? Reviewed-by:
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Dmitry Baryshkov authored
Add pin-controlled Low-Noise BB clock definition. Signed-off-by:
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Konrad Dybcio authored
Just like in case of other SoCs change SDCC1/SDCC2 ops to floor to avoid overclocking the controller. Fixes: cbe63bfd ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115") Signed-off-by:
Iskren Chernev <me@iskren.info> Signed-off-by:
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- 27 Dec, 2022 12 commits
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Dmitry Baryshkov authored
Add support for two GDSCs provided by this clock controller. Reviewed-by:
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Dmitry Baryshkov authored
The GCC driver registers the cxo clock as a thin wrapper around board's xo_board clock. Nowadays we can use the xo_board directly in all the clocks that use it. Use the fw_name "cxo" for this clock. Reviewed-by:
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Dmitry Baryshkov authored
Convert the clock driver to specify parent data rather than parent names, to actually bind using 'clock-names' specified in the DTS rather than global clock names. Use parent_hws where possible to refer parent clocks directly, skipping the lookup. Reviewed-by:
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Dmitry Baryshkov authored
Move PLL clock declarations up, before clock parent tables, so that we can use pll hw clock fields in the next commit. Reviewed-by:
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Dmitry Baryshkov authored
The test clock isn't in the bindings and apparently it's not used by anyone upstream. Remove it. Suggested-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
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Dmitry Baryshkov authored
The QCS404 uses 28nm HDMI PHY. The in-kernel driver doesn't provide the PLL (yet), but the out of tree patches used the name "hdmi_pll" for it. Other Qualcomm HDMI PHYs use either the name "hdmi_pll" (8960) or "hdmipll" (8996). Thus change the expected HDMI PLL clock name to "hdmi_pll". Reviewed-by:
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Dmitry Baryshkov authored
The QCS404 uses 28nm LPM DSI PHY, which registers dsi0pll and dsi0pllbyte clocks. Fix all DSI PHY clock names used as parents inside the GCC driver. Fixes: 652f1813 ("clk: qcom: gcc: Add global clock controller driver for QCS404") Reviewed-by:
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Dmitry Baryshkov authored
On the QCS404 platform the driver for the Global Clock Controller doens't define gpll0_out_aux and gpll4_out_aux clocks, so it's not possible to use them as parents. Remove entries for these clocks. Note: backporting this patch to earlier kernels would also require a previous patch which switches the gcc driver to use ARRAY_SIZE for parent data arrays. Fixes: 652f1813 ("clk: qcom: gcc: Add global clock controller driver for QCS404") Signed-off-by:
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Dmitry Baryshkov authored
Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data/names/hws easy and errorproof. Reviewed-by:
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Dmitry Baryshkov authored
Define clock/clock-names properties of the GCC device node to be used on QCS404 platform. Acked-by:
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Dmitry Baryshkov authored
Now as the gcc-qcs404 gained support for GDSC and requires using the #power-domain-cells property, switch the qcom,gcc-qcs404.yaml schema to use common gcc.yaml. Reviewed-by:
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Dmitry Baryshkov authored
On QCS404 platform the Global Clock Controller supports two GDSCs: MDSS (display) and OXILI (GPU). Add corresponding indices. Acked-by:
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- 25 Dec, 2022 2 commits
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Linus Torvalds authored
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Steven Rostedt (Google) authored
Due to several bugs caused by timers being re-armed after they are shutdown and just before they are freed, a new state of timers was added called "shutdown". After a timer is set to this state, then it can no longer be re-armed. The following script was run to find all the trivial locations where del_timer() or del_timer_sync() is called in the same function that the object holding the timer is freed. It also ignores any locations where the timer->function is modified between the del_timer*() and the free(), as that is not considered a "trivial" case. This was created by using a coccinelle script and the following commands: $ cat timer.cocci @@ expression ptr, slab; identifier timer, rfield; @@ ( - del_timer(&ptr->timer); + timer_shutdown(&ptr->timer); | - del_timer_sync(&ptr->timer); + timer_shutdown_sync(&ptr->timer); ) ... when strict when != ptr->timer ( kfree_rcu(ptr, rfield); | kmem_cache_free(slab, ptr); | kfree(ptr); ) $ spatch timer.cocci . > /tmp/t.patch $ patch -p1 < /tmp/t.patch Link: https://lore.kernel.org/lkml/20221123201306.823305113@linutronix.de/Signed-off-by:Steven Rostedt (Google) <rostedt@goodmis.org> Acked-by: Pavel Machek <pavel@ucw.cz> [ LED ] Acked-by: Kalle Valo <kvalo@kernel.org> [ wireless ] Acked-by: Paolo Abeni <pabeni@redhat.com> [ networking ] Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- 23 Dec, 2022 3 commits
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spiLinus Torvalds authored
Pull spi fix from Mark Brown: "One driver specific change here which handles the case where a SPI device for some reason tries to change the bus speed during a message on fsl_spi hardware, this should be very unusual" * tag 'spi-fix-v6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: fsl_spi: Don't change speed while chipselect is active
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Linus Torvalds authored
Merge tag 'regulator-fix-v6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator fixes from Mark Brown: "Two core fixes here, one for a long standing race which some Qualcomm systems have started triggering with their UFS driver and another fixing a problem with supply lookup introduced by the fixes for devm related use after free issues that were introduced in this merge window" * tag 'regulator-fix-v6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: regulator: core: fix deadlock on regulator enable regulator: core: Fix resolve supply lookup issue
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git://git.kernel.org/pub/scm/linux/kernel/git/jlawall/linuxLinus Torvalds authored
Pull coccicheck update from Julia Lawall: "Modernize use of grep in coccicheck: Use 'grep -E' instead of 'egrep'" * tag 'coccinelle-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/jlawall/linux: scripts: coccicheck: use "grep -E" instead of "egrep"
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