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- 27 Jan, 2018 1 commit
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Joel Stanley authored
This adds the stub of a driver for the ASPEED SoCs. The clocks are defined and the static registration is set up. Reviewed-by:
Andrew Jeffery <andrew@aj.id.au> Signed-off-by:
Joel Stanley <joel@jms.id.au> Reviewed-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 22 Dec, 2017 1 commit
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Sean Wang authored
Let the build system looking into the directiory where the clock drivers resides for the COMPILE_TEST alternative dependency allows test-building the drivers. Signed-off-by:
Sean Wang <sean.wang@mediatek.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 21 Dec, 2017 1 commit
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Chunyan Zhang authored
Added Spreadtrum's clock driver framework together with common structures and interface functions. Signed-off-by:
Chunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 02 Nov, 2017 1 commit
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Greg Kroah-Hartman authored
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by:
Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by:
Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 01 Sep, 2017 2 commits
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Andreas Färber authored
It fails to build once we introduce the ARCH_MB86S7X Kconfig symbol: drivers/clk/clk-mb86s7x.c:27:10: fatal error: soc/mb86s7x/scb_mhu.h: No such file or directory #include <soc/mb86s7x/scb_mhu.h> ^~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. And when commenting out that line, we get: drivers/clk/clk-mb86s7x.c: In function 'crg_gate_control': drivers/clk/clk-mb86s7x.c:72:8: error: implicit declaration of function 'mb86s7x_send_packet' [-Werror=implicit-function-declaration] ret = mb86s7x_send_packet(CMD_PERI_CLOCK_GATE_SET_REQ, ^~~~~~~~~~~~~~~~~~~ drivers/clk/clk-mb86s7x.c:72:28: error: 'CMD_PERI_CLOCK_GATE_SET_REQ' undeclared (first use in this function) ret = mb86s7x_send_packet(CMD_PERI_CLOCK_GATE_SET_REQ, ^~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/clk/clk-mb86s7x.c:72:28: note: each undeclared identifier is reported only once for each function it appears in drivers/clk/clk-mb86s7x.c: In function 'crg_rate_control': drivers/clk/clk-mb86s7x.c:116:10: error: 'CMD_PERI_CLOCK_RATE_SET_REQ' undeclared (first use in this function) code = CMD_PERI_CLOCK_RATE_SET_REQ; ^~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/clk/clk-mb86s7x.c:121:10: error: 'CMD_PERI_CLOCK_RATE_GET_REQ' undeclared (first use in this function); did you mean 'CMD_PERI_CLOCK_RATE_SET_REQ'? code = CMD_PERI_CLOCK_RATE_GET_REQ; ^~~~~~~~~~~~~~~~~~~~~~~~~~~ CMD_PERI_CLOCK_RATE_SET_REQ drivers/clk/clk-mb86s7x.c: In function 'mhu_cluster_rate': drivers/clk/clk-mb86s7x.c:276:10: error: 'CMD_CPU_CLOCK_RATE_GET_REQ' undeclared (first use in this function) code = CMD_CPU_CLOCK_RATE_GET_REQ; ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/clk/clk-mb86s7x.c:278:10: error: 'CMD_CPU_CLOCK_RATE_SET_REQ' undeclared (first use in this function); did you mean 'CMD_CPU_CLOCK_RATE_GET_REQ'? code = CMD_CPU_CLOCK_RATE_SET_REQ; ^~~~~~~~~~~~~~~~~~~~~~~~~~ CMD_CPU_CLOCK_RATE_GET_REQ cc1: some warnings being treated as errors scripts/Makefile.build:302: recipe for target 'drivers/clk/clk-mb86s7x.o' failed make[2]: *** [drivers/clk/clk-mb86s7x.o] Error 1 Remove the driver for now. Signed-off-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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Gabriel Fernandez authored
This patch enables clocks for STM32H743 boards. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> for MFD changes: Acked-by:
Lee Jones <lee.jones@linaro.org> for DT-Bindings Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 31 Aug, 2017 1 commit
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Eugeniy Paltsev authored
HSDK board manages its clocks using various PLLs. These PLL have same dividers and corresponding control registers mapped to different addresses. So we add one common driver for such PLLs. Each PLL on HSDK board consists of three dividers: IDIV, FBDIV and ODIV. Output clock value is managed using these dividers. We add pre-defined tables with supported rate values and appropriate configurations of IDIV, FBDIV and ODIV for each value. As of today we add support for PLLs that generate clock for the HSDK arc cpus, system, ddr, AXI tunnel and hdmi. By this patch we add support for several plls (arc cpus pll and others), so we had to use two different init types: CLK_OF_DECLARE for arc cpus pll and regular probing for others plls. Signed-off-by:
Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Reviewed-by:
Vineet Gupta <vgupta@synopsys.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 11 Jul, 2017 1 commit
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Paul Burton authored
Add a driver for the clocks provided by the MIPS Boston board from Imagination Technologies. 2 clocks are provided - the system clock & the CPU clock - and each is a simple fixed rate clock whose frequency can be determined by reading a register provided by the board. Signed-off-by:
Paul Burton <paul.burton@imgtec.com> Acked-by:
Stephen Boyd <sboyd@codeaurora.org> Reviewed-by:
James Hogan <james.hogan@imgtec.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16483/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- 21 Jun, 2017 1 commit
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Linus Walleij authored
The Cortina Systems Gemini (SL3516/CS3516) has an on-chip clock controller that derive all clocks from a single crystal, using some documented and some undocumented PLLs, half dividers, counters and gates. This is a best attempt to construct a clock driver for the clocks so at least we can gate off unused hardware and driver the PCI bus clock. Acked-by:
Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> [sboyd@codeaurora.org: Fix devm_ioremap_resource() return value checking] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 14 Jun, 2017 1 commit
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Tero Kristo authored
In K2G, the clock handling is done through firmware executing on a separate core. Linux kernel needs to communicate to the firmware through TI system control interface to access any power management related resources, including clocks. The keystone sci-clk driver does this, by communicating to the firmware through the TI SCI driver. The driver adds support for registering clocks through DT, and basic required clock operations like prepare/get_rate, etc. Signed-off-by:
Tero Kristo <t-kristo@ti.com> [sboyd@codeaurora.org: Make ti_sci_init_clocks() static] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 02 Jun, 2017 1 commit
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Dong Aisheng authored
These helper function allows drivers to get several clk consumers in one operation. If any of the clk cannot be acquired then any clks that were got will be put before returning to the caller. This can relieve the driver owners' life who needs to handle many clocks, as well as each clock error reporting. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Mark Brown <broonie@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Anson Huang <anson.huang@nxp.com> Cc: Robin Gong <yibin.gong@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Cc: Leonard Crestez <leonard.crestez@nxp.com> Cc: Octavian Purdila <octavian.purdila@nxp.com> Signed-off-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 24 May, 2017 1 commit
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Geert Uytterhoeven authored
The goals are to: - Allow precise control over and automatic selection of which (sub)drivers are used for which SoC (which may change in the future), - Allow adding support for new SoCs easily, - Allow compile-testing of all (sub)drivers, - Keep driver selection logic in the subsystem-specific Kconfig, independent from the architecture-specific Kconfig (i.e. no "select" from arch/arm64/Kconfig.platforms), to avoid dependencies. This is implemented by: - Introducing Kconfig symbols for all drivers and sub-drivers, - Introducing the Kconfig symbol CLK_RENESAS, which is enabled automatically when building for a Renesas ARM platform, and which enables all required drivers without interaction of the user, based on SoC-specific ARCH_* symbols, - Allowing the user to enable any Kconfig symbol manually if COMPILE_TEST is enabled, - Using the new Kconfig symbols instead of the ARCH_* symbols to control compilation in the Makefile, - Always entering drivers/clk/renesas/ during the build. Note that currently not all (sub)drivers are enabled for compile-testing, as they depend on independent fixes in other subsystems. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Simon Horman <horms+renesas@verge.net.au> Acked-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 22 Apr, 2017 1 commit
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Daniel Lezcano authored
The hi655x multi function device is a PMIC providing regulators. The PMIC also provides a clock for the WiFi and the Bluetooth, let's implement this clock in order to add it in the hi655x MFD and allow proper wireless initialization. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> [sboyd@codeaurora.org: Remove clkdev usage] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 27 Jan, 2017 1 commit
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Pierre-Louis Bossart authored
Fix Makefile for x86 support, dependency on CONFIG_COMMON_CLK was not explicit Fixes: 701190fd ('clk: x86: add support for Lynxpoint LPSS clocks') Signed-off-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Acked-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 21 Jan, 2017 1 commit
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Marek Vasut authored
Add driver for IDT VersaClock 5 5P49V5923 and 5P49V5933 chips. These chips have two clock inputs, XTAL or CLK, which are muxed into single PLL/VCO input. In case of 5P49V5923, the XTAL in built into the chip while the 5P49V5923 requires external XTAL. The PLL feeds two fractional dividers. Each fractional divider feeds output mux, which allows selecting between clock from the fractional divider itself or from output mux on output N-1. In case of output mux 0, the output N-1 is instead connected to the output from the mux feeding the PLL. The driver thus far supports only the 5P49V5923 and 5P49V5933, while it should be easily extensible to the whole 5P49V59xx family of chips as they are all pretty similar. Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Cc: Michael Turquette <mturquette@baylibre.com> Reviewed-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: linux-renesas-soc@vger.kernel.org Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 23 Sep, 2016 1 commit
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Kelvin Cheung authored
Factor out the common functions into loongson1/clk.c to support both Loongson1B and Loongson1C. And, put the rest into loongson1/clk-loongson1b.c. Signed-off-by:
Kelvin Cheung <keguang.zhang@gmail.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 16 Sep, 2016 1 commit
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Masahiro Yamada authored
This includes UniPhier clock driver code, except SoC-specific data arrays. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 15 Aug, 2016 1 commit
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Laxman Dewangan authored
The clock IP used on the Maxim PMICs max77686 and max77802 are same. The configuration of clock register is also same except the number of clocks. Part of common code utilisation, there is 3 files for these chips clock driver, one for common and two files for driver registration. Combine both drivers into single file and move common code into same common file reduces the 2 files and make max77686 and max77802 clock driver in single fine. This driver does not depends on the parent driver structure. The regmap handle is acquired through regmap APIs for the register access. This combination of driver helps on adding clock driver for different Maxim PMICs which has similar clock IP like MAX77620 and MAX20024. Signed-off-by:
Laxman Dewangan <ldewangan@nvidia.com> CC: Krzysztof Kozlowski <k.kozlowski@samsung.com> CC: Javier Martinez Canillas <javier@dowhile0.org> Reviewed-by:
Javier Martinez Canillas <javier@osg.samsung.com> Tested-by:
Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Tested-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 19 Jul, 2016 1 commit
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Michael Turquette authored
Sorting is hard. Signed-off-by:
Michael Turquette <mturquette@baylibre.com>
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- 09 Jul, 2016 1 commit
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Maxime Ripard authored
Start our new clock infrastructure by adding the registration code, common structure and common code. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
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- 23 Jun, 2016 1 commit
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Michael Turquette authored
Break the AmLogic clock code up so that only the necessary parts are compiled and linked. The core code is selected by both arm and arm64 builds with COMMON_CLK_AMLOGIC. The individual drivers have their own config options as well. Tested-by:
Kevin Hilman <khilman@baylibre.com> Signed-off-by:
Michael Turquette <mturquette@baylibre.com>
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- 13 May, 2016 1 commit
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Purna Chandra Mandal authored
This clock driver implements PIC32 specific clock-tree. clock-tree entities can only be configured through device-tree file (OF). Signed-off-by:
Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-clk@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13247/Signed-off-by:
Ralf Baechle <ralf@linux-mips.org>
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- 06 May, 2016 1 commit
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Jose Abreu authored
The ARC SDP I2S clock can be programmed using a specific PLL. This patch has the goal of adding a clock driver that programs this PLL. At this moment the rate values are hardcoded in a table but in the future it would be ideal to use a function which determines the PLL values given the desired rate. Signed-off-by:
Jose Abreu <joabreu@synopsys.com> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 21 Apr, 2016 1 commit
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Neil Armstrong authored
Add Oxford Semiconductor OXNAS SoC Family Standard Clocks support. Signed-off-by:
Neil Armstrong <narmstrong@baylibre.com> [sboyd@codeaurora.org: Drop NULL/continue check in registration loop] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 15 Apr, 2016 1 commit
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Lars Persson authored
Add a driver for the main clock controller of the Artpec-6 Soc. Signed-off-by:
Lars Persson <larper@axis.com> [sboyd@codeaurora.org: Reformatted driver structure and of match] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 02 Apr, 2016 1 commit
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Thomas Petazzoni authored
The drivers/clk/mvebu directory is only being built when CONFIG_PLAT_ORION=y. As we are going to support additional mvebu platforms in drivers/clk/mvebu, which don't have CONFIG_PLAT_ORION=y, we need to recurse into this directory regardless of the value of CONFIG_PLAT_ORION. Since all files in drivers/clk/mvebu/ are already conditionally compiled depending on various Kconfig options, we can recurse unconditionally into drivers/clk/mvebu without any other change. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 03 Mar, 2016 1 commit
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Simon Horman authored
This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Along with the above mentioned Kconfig changes it seems appropriate to also rename directories that only hold drivers for such SoCs. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> Acked-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 02 Mar, 2016 1 commit
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Tony Lindgren authored
The arch independent drivers can be build testeed with COMPILE_TEST. Let's allow that for drivers/clk/ti. Signed-off-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Michael Turquette <mturquette@baylibre.com>
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- 25 Feb, 2016 1 commit
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Simon Horman authored
As of 9b5ba0df ("ARM: shmobile: Introduce ARCH_RENESAS") all platforms that use Renesas clock drivers now select ARCH_RENESAS. As it is present in drivers/clk/Makefile ARCH_SHMOBILE_MULTI may now be removed. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by:
Simon Horman <horms+renesas@verge.net.au> Acked-by:
Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 29 Jan, 2016 1 commit
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Marc Gonzalez authored
Requested by arm-soc maintainer Kevin Hilman in v9 review. http://article.gmane.org/gmane.linux.ports.arm.kernel/456331Signed-off-by:
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 24 Dec, 2015 1 commit
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Vladimir Zapolskiy authored
The change adds COMMON_CLK_NXP configuration symbol and enables it for NXP LPC18XX architecture, this is needed to reuse drivers/clk/nxp folder for NXP common clock framework drivers other than LPC18XX one. Signed-off-by:
Vladimir Zapolskiy <vz@mleia.com> Acked-by:
Joachim Eastwood <manabian@gmail.com> Signed-off-by:
Michael Turquette <mturquette@baylibre.com>
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- 08 Dec, 2015 1 commit
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Geert Uytterhoeven authored
Add a new R-Car H3 Clock Pulse Generator / Module Standby and Software Reset driver, using the new CPG/MSSR driver core. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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- 01 Dec, 2015 1 commit
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Kuninori Morimoto authored
This patch adds CS2000 Fractional-N driver as clock provider. Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> [sboyd@codeaurora.org: Fix unsigned checked for < 0 in cs2000_ratio_get()] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 16 Nov, 2015 1 commit
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Marc Gonzalez authored
Provide support for Sigma Designs Tango4 clock generator. NOTE: This driver is incompatible with Tango3 clkgen. Signed-off-by:
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [sboyd@codeaurora.org: Add kernel.h include for panic/sprintf] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 22 Oct, 2015 1 commit
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Jon Mason authored
The Broadcom Northstar 2 SoC is architected under the iProc architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. Signed-off-by:
Jon Mason <jonmason@broadcom.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 21 Oct, 2015 1 commit
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Maxime Ripard authored
Some clocks are using a multiplier component, however, unlike their mux, gate or divider counterpart, these factors don't have a basic clock implementation. This leads to code duplication across platforms that want to use that kind of clocks, and the impossibility to use the composite clocks with such a clock without defining your own rate operations. Create such a driver in order to remove these issues, and hopefully factor the implementations, reducing code size across platforms and consolidating the various implementations. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by:
Chen-Yu Tsai <wens@csie.org>
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- 09 Oct, 2015 1 commit
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Mike Looijmans authored
This patch adds the driver and devicetree documentation for the Silicon Labs SI514 clock generator chip. This is an I2C controlled oscillator capable of generating clock signals ranging from 100kHz to 250MHz. Signed-off-by:
Mike Looijmans <mike.looijmans@topic.nl> [sboyd@codeaurora.org: Drop clk.h include, remove some casts] Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 02 Oct, 2015 1 commit
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Eric Anholt authored
clk-bcm2835.c predates the drivers under bcm/, but all the new BCM drivers are going in there so let's follow them. Signed-off-by:
Eric Anholt <eric@anholt.net> Acked-by:
Stephen Warren <swarren@wwwdotorg.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- 28 Sep, 2015 1 commit
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Sudeep Holla authored
On some ARM based systems, a separate Cortex-M based System Control Processor(SCP) provides the overall power, clock, reset and system control. System Control and Power Interface(SCPI) Message Protocol is defined for the communication between the Application Cores(AP) and the SCP. This patch adds support for the clocks provided by SCP using SCPI protocol. Signed-off-by:
Sudeep Holla <sudeep.holla@arm.com> Reviewed-by:
Stephen Boyd <sboyd@codeaurora.org> Cc: Mike Turquette <mturquette@baylibre.com> Cc: Liviu Dudau <Liviu.Dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Jon Medhurst (Tixy) <tixy@linaro.org> Cc: linux-clk@vger.kernel.org
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- 07 Jul, 2015 1 commit
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Sergej Sawazki authored
The file clk-gpio-gate.c does not only contain the gate clock, but also the mux clock. Rename the file to clk-gpio.c. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by:
Sergej Sawazki <ce3a@gmx.de> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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