- 23 Apr, 2021 6 commits
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Nick Desaulniers authored
While removing allnoconfig_y from Kconfig, ARCH=mips allnoconfig builds started failing with the error: WARNING: modpost: vmlinux.o(.text+0x9c70): Section mismatch in reference from the function reserve_exception_space() to the function .meminit.text:memblock_reserve() The function reserve_exception_space() references the function __meminit memblock_reserve(). This is often because reserve_exception_space lacks a __meminit annotation or the annotation of memblock_reserve is wrong. ERROR: modpost: Section mismatches detected. Set CONFIG_SECTION_MISMATCH_WARN_ONLY=y to allow them. allnoconfig disables DEBUG_KERNEL and thus ARCH_KEEP_MEMBLOCK, which changes __init_memblock to be equivalent to __meminit triggering the above error. Link: https://lore.kernel.org/linux-kbuild/20210313194836.372585-11-masahiroy@kernel.org/Reported-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Nick Desaulniers <ndesaulniers@google.com> Reviewed-by:
Masahiro Yamada <masahiroy@kernel.org> Signed-off-by:
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Romain Naour authored
From [1] "GCC 10 (PR 91233) won't silently allow registers that are not architecturally available to be present in the clobber list anymore, resulting in build failure for mips*r6 targets in form of: ... .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target 146 | __asm__ volatile ( \ | ^~~~~~~ This is because base R6 ISA doesn't define hi and lo registers w/o DSP extension. This patch provides the alternative clobber list for r6 targets that won't include those registers." Since kernel 5.4 and mips support for generic vDSO [2], the kernel fail to build for mips r6 cpus with gcc 10 for the same reason as glibc. [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8 [2] '24640f23 ("mips: Add support for generic vDSO")' Signed-off-by:Romain Naour <romain.naour@gmail.com> Signed-off-by:
Sudip Mukherjee <sudipm.mukherjee@gmail.com> Signed-off-by:
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xiaochuan mao authored
make license from GPL3.0 to GPL2.0 Signed-off-by:
xiaochuan mao <maoxiaochuan@loongson.cn> Signed-off-by:
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xiaochuan mao authored
from Loongson-2K1000 user manual know that under pci bus the device num is 4, function number is 2 and register is 0x2200 is ohci. the ohci interrupt number is 51. because Loongson-2K1000 has 64 interrupt sources, 0-31 correspond to the device tree liointc0 device node, and the other correspond to liointc1 node. so it should be number 19 correspon to liointc1. Signed-off-by:
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Maciej W. Rozycki authored
Remove the inline asm with a DIVU instruction from `__div64_32' and use plain C code for the intended DIVMOD calculation instead. GCC is smart enough to know that both the quotient and the remainder are calculated with single DIVU, so with ISAs up to R5 the same instruction is actually produced with overall similar code. For R6 compiled code will work, but separate DIVU and MODU instructions will be produced, which are also interlocked, so scalar implementations will likely not perform as well as older ISAs with their asynchronous MD unit. Likely still faster then the generic algorithm though. This removes a compilation error for R6 however where the original DIVU instruction is not supported anymore and the MDU accumulator registers have been removed and consequently GCC complains as to a constraint it cannot find a register for: In file included from ./include/linux/math.h:5, from ./include/linux/kernel.h:13, from mm/page-writeback.c:15: ./include/linux/math64.h: In function 'div_u64_rem': ./arch/mips/include/asm/div64.h:76:17: error: inconsistent operand constraints in an 'asm' 76 | __asm__("divu $0, %z1, %z2" \ | ^~~~~~~ ./include/asm-generic/div64.h:245:25: note: in expansion of macro '__div64_32' 245 | __rem = __div64_32(&(n), __base); \ | ^~~~~~~~~~ ./include/linux/math64.h:91:22: note: in expansion of macro 'do_div' 91 | *remainder = do_div(dividend, divisor); | ^~~~~~ This has passed correctness verification with test_div64 and reduced the module's average execution time down to 1.0404s from 1.0445s with R3400 @40MHz. The module's MIPS I machine code has also shrunk by 12 bytes or 3 instructions. Signed-off-by:Maciej W. Rozycki <macro@orcam.me.uk> Signed-off-by:
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Maciej W. Rozycki authored
The word is spelt with a final "d" of course. What a massive messup! Signed-off-by:
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- 21 Apr, 2021 8 commits
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Maciej W. Rozycki authored
Align the expected result with one actually produced for easier visual comparison; this has to take into account what the format specifiers will actually produce rather than the characters they consist of. E.g.: test_div64: ERROR: 10000000ab275080 / 00000009 => 01c71c71da20d00e,00000002 test_div64: ERROR: expected value => 0000000013045e47,00000001 (with a failure induced by setting bit #60 of the divident). Signed-off-by:
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xiaochuan mao authored
from arch/mips/kernel/head.S we know that use a0~a3 for fw_arg0~fw_arg3 there is some code from head.S: LONG_S a0, fw_arg0 # firmware arguments LONG_S a1, fw_arg1 LONG_S a2, fw_arg2 LONG_S a3, fw_arg3 Signed-off-by:
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Maciej W. Rozycki authored
We already check the high part of the divident against zero to avoid the costly DIVU instruction in that case, needed to reduce the high part of the divident, so we may well check against the divisor instead and set the high part of the quotient to zero right away. We need to treat the high part the divident in that case though as the remainder that would be calculated by the DIVU instruction we avoided. This has passed correctness verification with test_div64 and reduced the module's average execution time down to 1.0445s and 0.2619s from 1.0668s and 0.2629s respectively for an R3400 CPU @40MHz and a 5Kc CPU @160MHz. Signed-off-by:
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Maciej W. Rozycki authored
Our current MIPS platform `__div64_32' handler is inactive, because it is incorrectly only enabled for 64-bit configurations, for which generic `do_div' code does not call it anyway. The handler is not suitable for being called from there though as it only calculates 32 bits of the quotient under the assumption the 64-bit divident has been suitably reduced. Code for such reduction used to be there, however it has been incorrectly removed with commit c21004cd ("MIPS: Rewrite <asm/div64.h> to work with gcc 4.4.0."), which should have only updated an obsoleted constraint for an inline asm involving $hi and $lo register outputs, while possibly wiring the original MIPS variant of the `do_div' macro as `__div64_32' handler for the generic `do_div' implementation Correct the handler as follows then: - Revert most of the commit referred, however retaining the current formatting, except for the final two instructions of the inline asm sequence, which the original commit missed. Omit the original 64-bit parts though. - Rename the original `do_div' macro to `__div64_32'. Use the combined `x' constraint referring to the MD accumulator as a whole, replacing the original individual `h' and `l' constraints used for $hi and $lo registers respectively, of which `h' has been obsoleted with GCC 4.4. Update surrounding code accordingly. We have since removed support for GCC versions before 4.9, so no need for a special arrangement here; GCC has supported the `x' constraint since forever anyway, or at least going back to 1991. - Rename the `__base' local variable in `__div64_32' to `__radix' to avoid a conflict with a local variable in `do_div'. - Actually enable this code for 32-bit rather than 64-bit configurations by qualifying it with BITS_PER_LONG being 32 instead of 64. Include <asm/bitsperlong.h> for this macro rather than <linux/types.h> as we don't need anything else. - Finally include <asm-generic/div64.h> last rather than first. This has passed correctness verification with test_div64 and reduced the module's average execution time down to 1.0668s and 0.2629s from 2.1529s and 0.5647s respectively for an R3400 CPU @40MHz and a 5Kc CPU @160MHz. For a reference 64-bit `do_div' code where we have the DDIVU instruction available to do the whole calculation right away averages at 0.0660s for the latter CPU. Fixes: c21004cd ("MIPS: Rewrite <asm/div64.h> to work with gcc 4.4.0.") Reported-by:
Huacai Chen <chenhuacai@kernel.org> Signed-off-by:
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Maciej W. Rozycki authored
Correct inline documentation for `do_div', which is a function-like macro the `n' parameter of which has the semantics of a C++ reference: it is both read and written in the context of the caller without an explicit dereference such as with a pointer. In the C programming language it has no equivalent for proper functions, in terms of which the documentation expresses the semantics of `do_div', but substituting a pointer in documentation is misleading, and using the C++ notation should at least raise the reader's attention and encourage to seek explanation even if the C++ semantics is not readily understood. While at it observe that "semantics" is an uncountable noun, so refer to it with a singular rather than plural verb. Signed-off-by:
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Maciej W. Rozycki authored
Implement a module for correctness and performance evaluation for the `do_div' function, often handled in an optimised manner by platform code. Use a somewhat randomly generated set of inputs that is supposed to be representative, using the same set of divisors twice, expressed as a constant and as a variable each, so as to verify the implementation for both cases should they be handled by different code execution paths. Reference results were produced with GNU bc. At the conclusion output the total execution time elapsed. Signed-off-by:
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zhaoxiao authored
This patch replaces the "open-coded" -pg compile flag with a CC_FLAGS_FTRACE makefile variable which architectures can override if a different option should be used for code generation. Signed-off-by:
zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by:
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Ilya Lipnitskiy authored
This mostly reverts commit 99bca615 ("MIPS: pci-legacy: use generic pci_enable_resources"). Fixes regressions such as: ata_piix 0000:00:0a.1: can't enable device: BAR 0 [io 0x01f0-0x01f7] not claimed ata_piix: probe of 0000:00:0a.1 failed with error -22 The only changes from the strict revert are to fix checkpatch errors: ERROR: spaces required around that '=' (ctx:VxV) #33: FILE: arch/mips/pci/pci-legacy.c:252: + for (idx=0; idx < PCI_NUM_RESOURCES; idx++) { ^ ERROR: do not use assignment in if condition #67: FILE: arch/mips/pci/pci-legacy.c:284: + if ((err = pcibios_enable_resources(dev, mask)) < 0) Reported-by:
Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> Tested-by:
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- 16 Apr, 2021 9 commits
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Huacai Chen authored
Add kexec/kdump support for Loongson64 by: 1, Provide Loongson-specific kexec functions: loongson_kexec_prepare(), loongson_kexec_shutdown() and loongson_crash_shutdown(); 2, Provide Loongson-specific assembly code in kexec_smp_wait(); To start Loongson64, The boot CPU needs 3 parameters: fw_arg0: the number of arguments in cmdline (i.e., argc). fw_arg1: structure holds cmdline such as "root=/dev/sda1 console=tty" (i.e., argv). fw_arg2: environment (i.e., envp, additional boot parameters from LEFI). Non-boot CPUs do not need one parameter as the IPI mailbox base address. They query their own IPI mailbox to get PC, SP and GP in a loopi, until the boot CPU brings them up. loongson_kexec_prepare(): Setup cmdline for kexec/kdump. The kexec/kdump cmdline comes from kexec's "append" option string. This structure will be parsed in fw_init_cmdline() of arch/mips/fw/lib/cmdline.c. Both image ->control_code_page and the cmdline need to be in a safe memory region (memory allocated by the old kernel may be corrupted by the new kernel). In order to maintain compatibility for the old firmware, the low 2MB is reserverd and safe for Loongson. So let KEXEC_CTRL_CODE and KEXEC_ARGV_ ADDR be here. LEFI parameters may be corrupted at runtime, so backup it at mips_reboot_setup(), and then restore it at loongson_kexec_shutdown() /loongson_crash_shutdown(). loongson_kexec_shutdown(): Wake up all present CPUs and let them go to reboot_code_buffer. Pass the kexec parameters to kexec_args. loongson_crash_shutdown(): Pass the kdump parameters to kexec_args. The assembly part in kexec_smp_wait provide a routine as BIOS does, in order to keep secondary CPUs in a querying loop. The layout of low 2MB memory in our design: 0x80000000, the first MB, the first 64K, Exception vectors 0x80010000, the first MB, the second 64K, STR (suspend) data 0x80020000, the first MB, the third and fourth 64K, UEFI HOB 0x80040000, the first MB, the fifth 64K, RT-Thread for SMC 0x80100000, the second MB, the first 64K, KEXEC code 0x80108000, the second MB, the second 64K, KEXEC data Cc: Eric Biederman <ebiederm@xmission.com> Tested-by:Jinyang He <hejinyang@loongson.cn> Signed-off-by:
Youling Tang <tangyouling@loongson.cn> Signed-off-by:
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Ilya Lipnitskiy authored
Follow the reasoning from commit 842de40d ("PCI: add generic pci_enable_resources()"): The only functional difference from the MIPS version is that the generic one uses "!r->parent" to check for resource collisions instead of "!r->start && r->end". That should have no effect on any pci-legacy driver. Suggested-by:
Bjorn Helgaas <bhelgaas@google.com> Signed-off-by:
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Ilya Lipnitskiy authored
No drivers set the busn_resource field in the pci_controller struct. Commit 7ee214b5 ("MIPS: PCI: Remove unused busn_offset") almost removed it over 3 years ago. Remove it for good to free up memory and eliminate messages like: pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0] Signed-off-by:
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Ilya Lipnitskiy authored
Remove the following pci-legacy message: PCI host bridge /pci@440000/host-bridge ranges: MEM 0x0000000020000000..0x000000002fffffff IO 0x0000000000460000..0x000000000046ffff It is followed shortly by the same data from pci_register_host_bridge: PCI host bridge to bus 0000:00 pci_bus 0000:00: root bus resource [mem 0x20000000-0x2fffffff] pci_bus 0000:00: root bus resource [io 0x460000-0x46ffff] Signed-off-by: -
Ilya Lipnitskiy authored
Mirror commit aeba3731 ("powerpc/pci: Fix IO space breakage after of_pci_range_to_resource() change"). Most MIPS platforms do not define PCI_IOBASE, nor implement pci_address_to_pio(). Moreover, IO_SPACE_LIMIT is 0xffff for most MIPS platforms. of_pci_range_to_resource passes the _start address_ of the IO range into pci_address_to_pio, which then checks it against IO_SPACE_LIMIT and fails, because for MIPS platforms that use pci-legacy (pci-lantiq, pci-rt3883, pci-mt7620), IO ranges start much higher than 0xffff. In fact, pci-mt7621 in staging already works around this problem, see commit 09dd629e ("staging: mt7621-pci: fix io space and properly set resource limits") So just stop using of_pci_range_to_resource, which does not work for MIPS. Fixes PCI errors like: pci_bus 0000:00: root bus resource [io 0xffffffff] Fixes: 0b0b0893 ("of/pci: Fix the conversion of IO ranges into IO resources") Signed-off-by:
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Ilya Lipnitskiy authored
Existing strings do not make sense: one is always NULL and the other refers to the wrong parent node. Signed-off-by:
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Ilya Lipnitskiy authored
Fixes the following compiler warning: warning: unused variable 'flags' [-Wunused-variable] Fixes: e5067c71 ("MIPS: pci-rt3883: Remove odd locking in PCI config space access code") Signed-off-by:
Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: trivial@kernel.org Signed-off-by:
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Ilya Lipnitskiy authored
Mirror pci-rt3883 fix from commit e5067c71 ("MIPS: pci-rt3883: Remove odd locking in PCI config space access code"). pci-rt2880 shares the driver layout with pci-rt3883 and the same reasons apply. Caller (generic PCI code) already does proper locking, so no need to add another one here. Local PCI read/write functions are never called simultaneously, also they do not require synchronization with the PCI controller ops, since they are used before the controller registration. Suggested-by:
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Ilya Lipnitskiy authored
pci_fixup_irqs() used to call pcibios_map_irq on every PCI device, which for RT2880 included bus 0 slot 0. After pci_fixup_irqs() got removed, only slots/funcs with devices attached would be called. While arguably the right thing, that left no chance for this driver to ever initialize slot 0, effectively bricking PCI and USB on RT2880 devices such as the Belkin F5D8235-4 v1. Slot 0 configuration needs to happen after PCI bus enumeration, but before any device at slot 0x11 (func 0 or 1) is talked to. That was determined empirically by testing on a Belkin F5D8235-4 v1 device. A minimal BAR 0 config write followed by read, then setting slot 0 PCI_COMMAND to MASTER | IO | MEMORY is all that seems to be required for proper functionality. Tested by ensuring that full- and high-speed USB devices get enumerated on the Belkin F5D8235-4 v1 (with an out of tree DTS file from OpenWrt). Fixes: 04c81c72 ("MIPS: PCI: Replace pci_fixup_irqs() call with host bridge IRQ mapping hooks") Signed-off-by:
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- 15 Apr, 2021 1 commit
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Thomas Bogendoerfer authored
Commit 04324f44 ("MIPS: Remove get_fs/set_fs") changed the access_ok for strnlen_user to check the whole range, which broke some callers of strndup_user(). Restore the old behaviour and just check the first byte. Fixes: 04324f44 ("MIPS: Remove get_fs/set_fs") Signed-off-by:
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- 13 Apr, 2021 1 commit
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Paul Burton authored
The MIPS implementation of access_ok() incorrectly reports that access to the final byte of user memory is not OK, much as the alpha & SH versions did prior to commit 94bd8a05 ("Fix 'acccess_ok()' on alpha and SH"). For example on a MIPS64 system with __UA_LIMIT == 0xffff000000000000 we incorrectly fail in the following cases: access_ok(0xffffffffffff, 0x1) = 0 access_ok(0xfffffffffffe, 0x2) = 0 Fix MIPS in the same way as alpha & SH, by subtracting one from the addr + size condition when size is non-zero. With this the access_ok() calls above return 1 indicating that the access may be valid. The cost of the improved check is pretty minimal - we gain 2410 bytes, or 0.03%, in kernel code size for a 64r6el_defconfig kernel built using GCC 8.1.0. Signed-off-by:
Paul Burton <paul.burton@mips.com> Reported-by:
Linus Torvalds <torvalds@linux-foundation.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
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- 12 Apr, 2021 4 commits
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Lifu Chen authored
spinlock can be initialized automatically with DEFINE_SPINLOCK() rather than explicitly calling spin_lock_init(). Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Lifu Chen <chenlifu@huawei.com> Signed-off-by:
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Ilya Lipnitskiy authored
Most MT7621 SoCs have 2 cores, which is detected and supported properly by CPS. Unfortunately, MT7621 SoC has a less common S variant with only one core. On MT7621S, GCR_CONFIG still reports 2 cores, which leads to hangs when starting SMP. CPULAUNCH registers can be used in that case to detect the absence of the second core and override the GCR_CONFIG PCORES field. Rework a long-standing OpenWrt patch to override the value of mips_cps_numcores on single-core MT7621 systems. Tested on a dual-core MT7621 device (Ubiquiti ER-X) and a single-core MT7621 device (Netgear R6220). Original 4.14 OpenWrt patch: Link: https://git.openwrt.org/?p=openwrt/openwrt.git;a=commitdiff;h=4cdbc90a376dd0555201c1434a2081e055e9ceb7 Current 5.10 OpenWrt patch: Link: https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/ramips/patches-5.10/320-mt7621-core-detect-hack.patch;h=c63f0f4c1ec742e24d8480e80553863744b58f6a;hb=10267e17299806f9885d086147878f6c492cb904Suggested-by:
Felix Fietkau <nbd@nbd.name> Signed-off-by:
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Nathan Chancellor authored
With the latest mkimage from U-Boot 2021.04, the generic defconfigs no longer build, failing with: /usr/bin/mkimage: verify_header failed for FIT Image support with exit code 1 This is expected after the linked U-Boot commits because '@' is forbidden in the node names due to the way that libfdt treats nodes with the same prefix but different unit addresses. Switch the '@' in the node name to '-'. Drop the unit addresses from the hash and kernel child nodes because there is only one node so they do not need to have a number to differentiate them. Cc: stable@vger.kernel.org Link: https://source.denx.de/u-boot/u-boot/-/commit/79af75f7776fc20b0d7eb6afe1e27c00fdb4b9b4 Link: https://source.denx.de/u-boot/u-boot/-/commit/3f04db891a353f4b127ed57279279f851c6b4917Suggested-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Nathan Chancellor <nathan@kernel.org> Reviewed-by:
Tom Rini <trini@konsulko.com> Signed-off-by:
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Thomas Bogendoerfer authored
Clean up macros even further after removal get_fs/set_fs. Signed-off-by:
Christoph Hellwig <hch@lst.de>
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- 09 Apr, 2021 1 commit
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Thomas Bogendoerfer authored
Cavium Octeon has its own memcpy implementation and also need the change done in commit 04324f44 ("MIPS: Remove get_fs/set_fs"). Fixes: 04324f44 ("MIPS: Remove get_fs/set_fs") Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
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- 07 Apr, 2021 1 commit
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Thomas Bogendoerfer authored
Commit 45deb5fa ("MIPS: uaccess: Remove get_fs/set_fs call sites") caused a few new sparse warnings, fix them. Signed-off-by:
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- 06 Apr, 2021 9 commits
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Ilya Lipnitskiy authored
RT288X systems may have a non-zero ramstart causing problems with memory reservations and boot hangs, as well as messages like: Wasting 1048576 bytes for tracking 32768 unused pages Both are alleviated by selecting MIPS_AUTO_PFN_OFFSET for such platforms. Tested on a Belkin F5D8235 v1 RT2880 device. Link: https://lore.kernel.org/linux-mips/20180820233111.xww5232dxbuouf4n@pburton-laptop/Signed-off-by:
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Tiezhu Yang authored
Loongson64 processors have a writecombine issue that maybe failed to write back framebuffer used with ATI Radeon or AMD GPU at times, after commit 8a08e50c ("drm: Permit video-buffers writecombine mapping for MIPS"), there exists some errors such as blurred screen and lockup, and so on. [ 60.958721] radeon 0000:03:00.0: ring 0 stalled for more than 10079msec [ 60.965315] radeon 0000:03:00.0: GPU lockup (current fence id 0x0000000000000112 last fence id 0x000000000000011d on ring 0) [ 60.976525] radeon 0000:03:00.0: ring 3 stalled for more than 10086msec [ 60.983156] radeon 0000:03:00.0: GPU lockup (current fence id 0x0000000000000374 last fence id 0x00000000000003a8 on ring 3) As discussed earlier [1], it might be better to disable writecombine on the CPU detection side because the root cause is unknown now. Actually, this patch is a temporary solution to just make it work well, it is not a proper and final solution, I hope someone will have a better solution to fix this issue in the future. [1] https://lore.kernel.org/patchwork/patch/1285542/Signed-off-by:
Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by:
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Thomas Bogendoerfer authored
All get_fs/set_fs calls in MIPS code are gone, so remove implementation of it. With the clear separation of user/kernel space access we no longer need the EVA special handling, so get rid of that, too. Signed-off-by:
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Thomas Bogendoerfer authored
Use new helpers to access user/kernel for functions, which are used with user/kernel pointers. Instead of dealing with get_fs/set_fs select user/kernel access via parameter. Signed-off-by:
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Thomas Bogendoerfer authored
Added __get/__put_kernel_nofault as preparation for removing get/set_fs. Signed-off-by:
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Thomas Bogendoerfer authored
flush_icache_range always does flush kernel address ranges, so no need to do the set_fs dance. Signed-off-by:
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Florian Fainelli authored
Provide hooks to intercept bad usages of virt_to_phys() and __pa_symbol() throughout the kernel. To make this possible, we need to rename the current implement of virt_to_phys() into __virt_to_phys_nodebug() and wrap it around depending on CONFIG_DEBUG_VIRTUAL. A similar thing is needed for __pa_symbol() which is now aliased to __phys_addr_symbol() whose implementation is either the direct return of RELOC_HIDE or goes through the debug version. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Álvaro Fernández Rojas authored
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add HS SPI controller - Add NAND controller. - Add USBH PHY. Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by:
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Álvaro Fernández Rojas authored
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add watchdog controller. - Add SPI controller. - Add NAND controller. - Add USBH PHY controller. - Add RNG controller. - Add cfi-flash controller. Signed-off-by:
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