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    • Matt Roper's avatar
      drm/xe: Define all possible engines in media IP descriptors · 62422b7b
      Matt Roper authored
      Rather than trying to identify exactly which engines are available on
      each platform in the IP descriptor, just include the list of all media
      engines that the IP could theoretically support (i.e., 8 VCS + 4 VECS).
      We still rely on the media fuse registers to tell us which specific
      engine instances are actually present on a given platform, so there
      shouldn't be any functional change.  This will help prevent mistakes
      with engine numbering (for example ambiguity about whether the 2nd VCS
      engine on a platform with exactly two engines is numbered "VCS1" or
      "VCS2") and will also future-proof the code a bit more in case new SKUs
      or platform refreshes extend the engine list in the future.
      
      Note that the media fuse register technically has an 8-bit field for
      VECS engine presence starting on Xe2.  However there's still no MMIO
      register range reserved for VE engines above VECS3, so VE0-VE3 is still
      consider the "maximum" VE engine mask that the driver can support for
      now.
      
      Bspec: 52614, 52615, 62567
      Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
      Reviewed-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20240417152621.3357990-2-matthew.d.roper@intel.com
      62422b7b