- 12 Apr, 2023 15 commits
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Walker Chen authored
The DMA controller needs two reset items to work properly on JH7110 SoC, so there is need to constrain the items' value to 2, other platforms have 1 reset item at most. Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Walker Chen <walker.chen@starfivetech.com> Link: https://lore.kernel.org/r/20230322094820.24738-2-walker.chen@starfivetech.comSigned-off-by:
Vinod Koul <vkoul@kernel.org>
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Rob Herring authored
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@gmail.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230331182141.1900348-1-robh@kernel.orgSigned-off-by:
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Claudiu Beznea authored
Align the declaration of ret in atmel_xdmac_resume() with the rest of variables. Do this by adding ret to the line with declaration for i variable. Signed-off-by:
Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230214151827.1050280-8-claudiu.beznea@microchip.comSigned-off-by:
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Claudiu Beznea authored
Add a warning message on suspend to let the user that there are channels not paused by their consumers. Signed-off-by:
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Claudiu Beznea authored
Do not global enable all the cyclic channels in at_xdmac_resume(). Instead save the global status in at_xdmac_suspend() and re-enable the cyclic channel only if it was active before suspend. Fixes: e1f7c9ee ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver") Signed-off-by:
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Claudiu Beznea authored
In case the system suspends to a deep sleep state where power to DMA controller is cut-off we need to restore the content of GRWS register. This is a write only register and writing bit X tells the controller to suspend read and write requests for channel X. Thus set GRWS before restoring the content of GE (Global Enable) regiter. Fixes: e1f7c9ee ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver") Signed-off-by:
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Claudiu Beznea authored
In case there are DMA channels not paused by consumers in suspend process (valid on AT91 SoCs for serial driver when no_console_suspend) the driver pauses them (using at_xdmac_device_pause() which is also the same function called by dmaengine_pause()) and then in the resume process the driver resumes them calling at_xdmac_device_resume() which is the same function called by dmaengine_resume()). This is good for DMA channels not paused by consumers but for drivers that calls dmaengine_pause()/dmaegine_resume() on suspend/resume path this may lead to DMA channel being enabled before the IP is enabled. For IPs that needs strict ordering with regards to DMA channel enablement this will lead to wrong behavior. To fix this add a new set of functions at_xdmac_device_pause_internal()/at_xdmac_device_resume_internal() to be called only on suspend/resume. Fixes: e1f7c9ee ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver") Signed-off-by:
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Claudiu Beznea authored
In case there are channels not paused during suspend (which on AT91 case is valid for serial driver when no_console_suspend boot argument is used) the at_xdmac_runtime_suspend_descriptors() was called more than one time due to at_xdmac_off(). To fix this add a new argument to at_xdmac_off() to specify if runtime PM reference counter needs to be decremented for queued active descriptors. Along with it moved the at_xdmac_runtime_suspend_descriptors() call under at_xdmac_chan_is_paused() check on suspend path as for the rest of channels the suspend is delayed by atmel_xdmac_prepare() in case channel is enabled. Same approach has been applied on resume path. Fixes: 650b0e99 ("dmaengine: at_xdmac: add runtime pm support") Signed-off-by:
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Claudiu Beznea authored
Runtime PM APIs for at_xdmac just plays with clk_enable()/clk_disable() letting aside the clk_prepare()/clk_unprepare() that needs to be executed as the clock is also prepared on probe. Thus instead of using runtime PM force suspend/resume APIs use clk_disable_unprepare() + pm_runtime_put_noidle() on suspend and clk_prepare_enable() + pm_runtime_get_noresume() on resume. This approach as been chosen instead of using runtime PM force suspend/resume with clk_unprepare()/clk_prepare() as it looks simpler and the final code is better. While at it added the missing pm_runtime_mark_last_busy() on suspend before decrementing the reference counter. Fixes: 650b0e99 ("dmaengine: at_xdmac: add runtime pm support") Signed-off-by:
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Walker Chen authored
The bit DMAC_CHEN[0] is automatically cleared by hardware to disable the channel after the last AMBA transfer of the DMA transfer to the destination has completed. Software can therefore poll this bit to determine when this channel is free for a new DMA transfer. This time requires at least 40 milliseconds on JH7110 SoC, otherwise an error message 'failed to stop' will be reported. Signed-off-by:
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Walker Chen authored
Add DMA reset operation in device probe and use different configuration on CH_CFG registers according to match data. Update all uses of of_device_is_compatible with of_device_get_match_data. Signed-off-by:
Emil Renner Berthing <emil.renner.berthing@canonical.com> Link: https://lore.kernel.org/r/20230322094820.24738-3-walker.chen@starfivetech.comSigned-off-by:
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Shunsuke Mie authored
The issue_pending request is ignored while driver is processing a DMA request. Fix to issue the pending requests on any dma channel status. Fixes: e63d79d1 ("dmaengine: Add Synopsys eDMA IP core driver") Signed-off-by:
Shunsuke Mie <mie@igel.co.jp> Link: https://lore.kernel.org/r/20230411101758.438472-2-mie@igel.co.jpSigned-off-by:
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Shunsuke Mie authored
The dw-edma driver stops after processing a DMA request even if a request remains in the issued queue, which is not the expected behavior. The DMA engine API requires continuous processing. Add a trigger to start after one processing finished if there are requests remain. Fixes: e63d79d1 ("dmaengine: Add Synopsys eDMA IP core driver") Signed-off-by:
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Rob Herring authored
qcom_hidma uses of_dma_configure() which is declared in of_device.h. platform_device.h and of_device.h get implicitly included by of_platform.h, but that is going to be removed soon. Signed-off-by:
Sinan Kaya <okaya@kernel.org> Link: https://lore.kernel.org/r/20230410232654.1561462-1-robh@kernel.orgSigned-off-by:
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Dmitry Baryshkov authored
gpi_ch_init() doesn't lock the ctrl_lock mutex, so there is no need to unlock it too. Instead the mutex is handled by the function gpi_alloc_chan_resources(), which properly locks and unlocks the mutex. ===================================== WARNING: bad unlock balance detected! 6.3.0-rc5-00253-g99792582ded1-dirty #15 Not tainted ------------------------------------- kworker/u16:0/9 is trying to release lock (&gpii->ctrl_lock) at: [<ffffb99d04e1284c>] gpi_alloc_chan_resources+0x108/0x5bc but there are no more locks to release! other info that might help us debug this: 6 locks held by kworker/u16:0/9: #0: ffff575740010938 ((wq_completion)events_unbound){+.+.}-{0:0}, at: process_one_work+0x220/0x594 #1: ffff80000809bdd0 (deferred_probe_work){+.+.}-{0:0}, at: process_one_work+0x220/0x594 #2: ffff575740f2a0f8 (&dev->mutex){....}-{3:3}, at: __device_attach+0x38/0x188 #3: ffff57574b5570f8 (&dev->mutex){....}-{3:3}, at: __device_attach+0x38/0x188 #4: ffffb99d06a2f180 (of_dma_lock){+.+.}-{3:3}, at: of_dma_request_slave_channel+0x138/0x280 #5: ffffb99d06a2ee20 (dma_list_mutex){+.+.}-{3:3}, at: dma_get_slave_channel+0x28/0x10c stack backtrace: CPU: 7 PID: 9 Comm: kworker/u16:0 Not tainted 6.3.0-rc5-00253-g99792582ded1-dirty #15 Hardware name: Google Pixel 3 (DT) Workqueue: events_unbound deferred_probe_work_func Call trace: dump_backtrace+0xa0/0xfc show_stack+0x18/0x24 dump_stack_lvl+0x60/0xac dump_stack+0x18/0x24 print_unlock_imbalance_bug+0x130/0x148 lock_release+0x270/0x300 __mutex_unlock_slowpath+0x48/0x2cc mutex_unlock+0x20/0x2c gpi_alloc_chan_resources+0x108/0x5bc dma_chan_get+0x84/0x188 dma_get_slave_channel+0x5c/0x10c gpi_of_dma_xlate+0x110/0x1a0 of_dma_request_slave_channel+0x174/0x280 dma_request_chan+0x3c/0x2d4 geni_i2c_probe+0x544/0x63c platform_probe+0x68/0xc4 really_probe+0x148/0x2ac __driver_probe_device+0x78/0xe0 driver_probe_device+0x3c/0x160 __device_attach_driver+0xb8/0x138 bus_for_each_drv+0x84/0xe0 __device_attach+0x9c/0x188 device_initial_probe+0x14/0x20 bus_probe_device+0xac/0xb0 device_add+0x60c/0x7d8 of_device_add+0x44/0x60 of_platform_device_create_pdata+0x90/0x124 of_platform_bus_create+0x15c/0x3c8 of_platform_populate+0x58/0xf8 devm_of_platform_populate+0x58/0xbc geni_se_probe+0xf0/0x164 platform_probe+0x68/0xc4 really_probe+0x148/0x2ac __driver_probe_device+0x78/0xe0 driver_probe_device+0x3c/0x160 __device_attach_driver+0xb8/0x138 bus_for_each_drv+0x84/0xe0 __device_attach+0x9c/0x188 device_initial_probe+0x14/0x20 bus_probe_device+0xac/0xb0 deferred_probe_work_func+0x8c/0xc8 process_one_work+0x2bc/0x594 worker_thread+0x228/0x438 kthread+0x108/0x10c ret_from_fork+0x10/0x20 Fixes: 5d0c3533 ("dmaengine: qcom: Add GPI dma driver") Signed-off-by:Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230409233355.453741-1-dmitry.baryshkov@linaro.orgSigned-off-by:
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- 31 Mar, 2023 17 commits
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Apurva Nandan authored
Add psil thread IDs for J784s4 and include J784s4 in the set of "k3_soc_devices" in k3-psil.c. Signed-off-by:
Apurva Nandan <a-nandan@ti.com> Signed-off-by:
Hari Nagalla <hnagalla@ti.com> Signed-off-by:
Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> [vaishnav.a@ti.com: add MCSPI-TX and 3rd CSI2RX instance entries] Signed-off-by:
Vaishnav Achath <vaishnav.a@ti.com> [j-choudhary@ti.com: add sa2ul entries, minor cleanups] Signed-off-by:
Jayesh Choudhary <j-choudhary@ti.com> Acked-by:
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Rob Herring authored
Replace of_get_address() and of_translate_address() calls with single call to of_address_to_resource(). Signed-off-by:
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Tom Rix authored
clang with W=1 reports drivers/dma/dw-edma/dw-edma-v0-core.c:162:20: error: unused function 'writeq_ch' [-Werror,-Wunused-function] static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, ^ drivers/dma/dw-edma/dw-edma-v0-core.c:185:19: error: unused function 'readq_ch' [-Werror,-Wunused-function] static inline u64 readq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch, ^ These functions and their wrapping macros are not used, so remove them. Signed-off-by:Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20230320234906.1730308-1-trix@redhat.comSigned-off-by:
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Tom Rix authored
clang with W=1 reports drivers/dma/ti/edma.c:321:20: error: unused function 'edma_and' [-Werror,-Wunused-function] static inline void edma_and(struct edma_cc *ecc, int offset, unsigned and) ^ This function is not used, so remove it. Signed-off-by: -
Harini Katakam authored
Align ZDMA DMA as well as coherent memory masks to 44 bit. This is required when using >32 bit memory regions. Signed-off-by:
Harini Katakam <harini.katakam@amd.com> Acked-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20230316093318.6722-1-harini.katakam@amd.comSigned-off-by:
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Tom Rix authored
clang with W=1 reports drivers/dma/tegra20-apb-dma.c:236:19: error: unused function 'tdma_read' [-Werror,-Wunused-function] static inline u32 tdma_read(struct tegra_dma *tdma, u32 reg) ^ This function is not used so remove it. Signed-off-by:Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20230322121001.2569909-1-trix@redhat.comSigned-off-by:
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Vignesh Raghavendra authored
Per [1], UDMA TR15 transactions may hang if ICNT0 is less than 64B Work around is to set EOL flag is to 1 for ICNT0. Since, there is no performance penalty / side effects of setting EOL flag event ICNTO > 64B, just set the flag for all UDMAP TR15 descriptors. [1] https://www.ti.com/lit/er/sprz455a/sprz455a.pdf Errata doc for J721E DRA829/TDA4VM Processors Silicon Revision 1.1/1.0 (Rev. A) Signed-off-by:
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Geert Uytterhoeven authored
The src_word_size and dst_word_size members of the rz_dmac_chan structure were never used, so they can be removed. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by:
Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/021bdf56f1716276a55bcfb1ea81bba5f1d42b3d.1679910274.git.geert+renesas@glider.beSigned-off-by:
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Dave Jiang authored
Add IAA (IAX) capability mask sysfs attribute to expose to applications. The mask provides application knowledge of what capabilities this IAA device supports. This mask is available for IAA 2.0 device or later. Signed-off-by:
Dave Jiang <dave.jiang@intel.com> Co-developed-by:
Fenghua Yu <fenghua.yu@intel.com> Signed-off-by:
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Dave Jiang authored
SWERROR register is 4 64bit wide registers. Currently the sysfs attribute just outputs 4 64bit hex integers. Convert to output with %*pb format specifier. Signed-off-by:
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Fenghua Yu authored
The translation fetch operation (0x0A) fetches address translations for the address range specified in the descriptor by issuing address translation (ATS) requests to the IOMMU. Add descriptor definitions for the operation so that user can use DSA to accelerate translation fetch. Signed-off-by:
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Fenghua Yu authored
The Data Integrity Extension (DIX) generate operation (0x17) computes the Data Integrity Field (DIF) on the source data and writes only the computed DIF for each source block to the PI destination address. Add descriptor definitions for this operation so that user can use DSA to accelerate DIX generate operation. Signed-off-by:
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Fenghua Yu authored
The memory fill operation (0x04) can fill in memory with either 8 bytes or 16 bytes of pattern. To fill in memory with 16 bytes of pattern, the first 8 bytes are provided in pattern lower in bytes 16-23 and the next 8 bytes are in pattern upper in bytes 40-47 in the descriptor. Currently only 8 bytes of pattern is enabled. Add descriptor definitions for pattern lower and pattern upper so that user can use 16 bytes of pattern to fill memory. Signed-off-by:
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Christophe JAILLET authored
Use devm_clk_get_[optional_]enabled() instead of hand writing it. It saves some LoC. Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/cc14e490f4e6002a17c9c7d283fe6a93179766c2.1679814350.git.christophe.jaillet@wanadoo.frSigned-off-by:
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Christophe JAILLET authored
If the probe is deferred, -EPROBE_DEFER should be returned, not +EPROBE_DEFER. Fixes: 3cd2c313 ("dmaengine: mv_xor_v2: Fix clock resource by adding a register clock") Signed-off-by:
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Vignesh Raghavendra authored
The K3 platforms configure the DMA resources with the help of the TI's System Firmware's Device Manager(DM) over TISCI. The group of DMA related Resource Manager[1] TISCI messages includes: INTA, RINGACC, UDMAP, and PSI-L. This configuration however, does not persist in the DM after leaving from Suspend-to-RAM state. We have to restore the DMA channel configuration over TISCI for all configured channels when returning from suspend. The TISCI resource management calls for each DMA type (UDMA, PKTDMA, BCDMA) happen in device_free_chan_resources() and device_alloc_chan_resources(). In pm_suspend() we store the current udma_chan_config for channels that still have attached clients and call device_free_chan_resources(). In pm_resume() restore the udma_channel_config from backup and call device_alloc_chan_resources() for those channels. Drivers like CPSW that use k3-udma-glue already do their own DMA resource management so use the late system suspend/resume hooks. [1] https://software-dl.ti.com/tisci/esd/latest/2_tisci_msgs/index.html#resource-management-rmSigned-off-by:
Georgi Vlaev <g-vlaev@ti.com> Acked-by:
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Mark Salter authored
Enabling TEGRA186_GPC_DMA will cause this build failure unless some other DMA driver which uses DMA_VIRTUAL_CHANNELS is enabled: ERROR: modpost: "vchan_dma_desc_free_list" [drivers/dma/tegra186-gpc-dma.ko] undefined! ERROR: modpost: "vchan_init" [drivers/dma/tegra186-gpc-dma.ko] undefined! ERROR: modpost: "vchan_tx_submit" [drivers/dma/tegra186-gpc-dma.ko] undefined! ERROR: modpost: "vchan_tx_desc_free" [drivers/dma/tegra186-gpc-dma.ko] undefined! ERROR: modpost: "vchan_find_desc" [drivers/dma/tegra186-gpc-dma.ko] undefined! make[1]: *** [scripts/Makefile.modpost:136: Module.symvers] Error 1 Add an explicit select of DMA_VIRTUAL_CHANNELS to avoid this. Signed-off-by:
Mark Salter <msalter@redhat.com> Link: https://lore.kernel.org/r/20230329172129.88403-1-msalter@redhat.comSigned-off-by:
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- 17 Mar, 2023 8 commits
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Janne Grunau authored
The block found on Apple's M2 SoC is compatible with the existing driver so add its per-SoC compatible. Acked-by:
Martin Povišer <povik+lin@cutebit.org> Acked-by:
Janne Grunau <j@jannau.net> Link: https://lore.kernel.org/r/20230202-asahi-t8112-dt-v3-13-d1a5f6383d95@jannau.netSigned-off-by:
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Bjorn Helgaas authored
<linux/aer.h> is unused, so remove it. Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Dave Jiang <dave.jiang@intel.com> Acked-by:
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Bjorn Helgaas authored
pci_enable_pcie_error_reporting() enables the device to send ERR_* Messages. Since f26e58bf ("PCI/AER: Enable error reporting when AER is native"), the PCI core does this for all devices during enumeration, so the driver doesn't need to do it itself. Remove the redundant pci_enable_pcie_error_reporting() call from the driver. Also remove the corresponding pci_disable_pcie_error_reporting() from the driver .remove() path. Note that this only controls ERR_* Messages from the device. An ERR_* Message may cause the Root Port to generate an interrupt, depending on the AER Root Error Command register managed by the AER service driver. Signed-off-by:
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Bjorn Helgaas authored
The PCIe Capability is defined by the PCIe spec, so use the PCI_EXP_DEVCTL macros defined by the PCI core instead of defining copies in IOAT. This makes it easier to find all uses of the PCIe Device Control register. No functional change intended. Signed-off-by:
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Rob Herring authored
It is preferred to use typed property access functions (i.e. of_property_read_<type> functions) rather than low-level of_get_property/of_find_property functions for reading properties. As part of this, convert of_get_property/of_find_property calls to the recently added of_property_present() helper when we just want to test for presence of a property and nothing more. Signed-off-by:
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Christophe JAILLET authored
The desc->desc structure is already zeroed when 'desc' is kzalloc()'ed. There is no need to clear it twice. Remove the redundant memset(). Signed-off-by:
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Biju Das authored
Document clock-names and reset-names properties as we have multiple clocks and resets. Signed-off-by:
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Biju Das authored
Add reset support for DMAC module found on RZ/G2L alike SoCs. For booting the board, reset release of the DMAC module is required otherwise we don't get GIC interrupts. Currently the reset release was done by the bootloader now move this to the driver instead. Signed-off-by:
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20230315064501.21491-1-biju.das.jz@bp.renesas.comSigned-off-by:
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