- 02 May, 2019 7 commits
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Noralf Trønnes authored
spi_split_transfers_maxsize() can be used to split a transfer. This function uses spi_res to lifetime manage the added transfer structures. So in order to finalize the current message while it contains the split transfers, spi_res_release() must be called after finalizing. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Noralf Trønnes authored
Don't warn about splitting transfers, the info is available in the statistics if needed. Signed-off-by: Noralf Trønnes <noralf@tronnes.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Jarkko Nikula authored
Falling back to maximum speed of the controller in case of SPI slave maximum speed is not set is needless. It already defaults to maximum speed of the controller since commit 052eb2d4 ("spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Cao Van Dong authored
Document SoC specific bindings for R-Car RZ/G1C(r8a77470) SoC. Signed-off-by: Cao Van Dong <cv-dong@jinso.co.jp> Signed-off-by: Mark Brown <broonie@kernel.org>
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Flavio Suligoi authored
With dw_dmac, sometimes the request of a DMA channel fails because the DMA driver is not ready, so an explicit dependency request is necessary. Signed-off-by: Flavio Suligoi <f.suligoi@asem.it> Signed-off-by: Mark Brown <broonie@kernel.org>
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YueHaibing authored
Stub helper spi_mem_default_supports_op() should be set to static inline Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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YueHaibing authored
When building with CONFIG_SPI_MEM is not set gc warns this: drivers/spi/spi-zynq-qspi.o: In function `zynq_qspi_supports_op': spi-zynq-qspi.c:(.text+0x1da): undefined reference to `spi_mem_default_supports_op' Fixes: 67dca5e5 ("spi: spi-mem: Add support for Zynq QSPI controller") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 08 Apr, 2019 16 commits
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Sowjanya Komatineni authored
Tegra SPI controller has TX and RX trimmers to tuning the delay of SPI master clock with respect to the data. TX and RX tap values are based on the platform validation across the PVT and the trimmer values vary based on the trace lengths to the corresponding SPI devices. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
This patch creates set_cs_timing SPI master optional method for SPI masters to implement configuring CS timing if applicable. This patch also creates spi_cs_timing accessory for SPI clients to use for requesting SPI master controllers to configure device requested CS setup time, hold time and inactive delay. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
This patch documents set_cs_timing SPI master method. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
This patch creates tegra_spi_soc_data structure to maintain and implement SPI HW feature differences between different Tegra chips and also creates a separate compatible string for T124/T210. Tegra210 and later has a separate interrupt mask register SPI_INTR_MASK for enabling or disabling interrupts while Tegra124 and prior uses interrupt enable bits in SPI_DMA_CTL register. This patch creates flag has_intr_mask_reg in tegra_spi_soc_data to identify this and implements accordingly. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
This patch adds 3 wire transfer support to SPI mode list along with its implementation. 3 wire or Bi-directional mode uses only one serial data pin for the transfer. SPI in master mode uses MOSI data line only and MISO data line is not used. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
This patch adds support for dual mode SPI transfer. Dual mode uses both MOSI and MISO lines in parallel where the data is interleaved on MOSI and MISO lines increasing the throughput. Packet from Tx FIFO is transmitted on both MOSI and MISO lines and packet to Rx FIFO is received from both MOSI and MISO lines. Even bits are transmitted or received on the MOSI data line and odd bits are transmitted or received on the MISO data line. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Andrey Smirnov authored
Replace spi_bitbang_start() with a combination of spi_bitbang_init() and devm_spi_register_master() and drop all of the explicit cleanup-related code that's no longer necessary. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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Andrey Smirnov authored
Move all of the code doing struct spi_bitbang initialization, so that it can be paired with devm_spi_register_master() in order to avoid having to call spi_bitbang_stop() explicitly. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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Andrey Smirnov authored
There's a number of failure paths in spi_gpio_probe() that do not call spi_master_put() potentially leaking memory. Fix this problem by registering a cleanup funciont via devm_add_action_or_reset() right after SPI controller is allocated. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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Flavio Suligoi authored
Change the type of the diagnostic message: "no DMA channels available, using PIO" from debug to warning. The lack of an available DMA channel is very important regard the spi-pxa2xx performance. The transfer speed can be reduced more than 50%. So it is very important to warn the user about this, without enabling the full SPI debug with CONFIG_SPI_DEBUG. Moreover, enabling the full SPI debug only to enable this specific debug message, the dmesg buffer fills quickly with a lot of repetitive information during the SPI data transfer. This cause the loss of all the first important messages written during the initialization. Signed-off-by: Flavio Suligoi <f.suligoi@asem.it> Signed-off-by: Mark Brown <broonie@kernel.org>
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Axel Lin authored
Use is_slave local variable to avoid calling of_property_read_bool() twice. Remove redudant assignment for controller->bus_num, set it once is enough. Move setting controller->bits_per_word_mask close to the code init other controller fields. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Axel Lin authored
Add #ifdef CONFIG_PM guard to fix build warning when !CONFIG_PM drivers/spi/spi-fsl-lpspi.c:810:12: warning: ‘fsl_lpspi_runtime_suspend’ defined but not used [-Wunused-function] static int fsl_lpspi_runtime_suspend(struct device *dev) ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/spi/spi-fsl-lpspi.c:789:12: warning: ‘fsl_lpspi_runtime_resume’ defined but not used [-Wunused-function] static int fsl_lpspi_runtime_resume(struct device *dev) ^~~~~~~~~~~~~~~~~~~~~~~~ Fixes: 944c01a8 ("spi: lpspi: enable runtime pm for lpspi") Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Axel Lin authored
The original code already set controller as drvdata: platform_set_drvdata(pdev, controller); But commit 944c01a8 ("spi: lpspi: enable runtime pm for lpspi") added dev_set_drvdata(&pdev->dev, fsl_lpspi); so fsl_lpspi_remove() will get wrong pointer by platform_get_drvdata(). Fixes: 944c01a8 ("spi: lpspi: enable runtime pm for lpspi") Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sergei Shtylyov authored
The function names in the kernel-doc comments were mistyped, with a word "dirmap" being repeated twice, so fix them. Fixes: aa167f3f ("spi: spi-mem: Add a new API to support direct mapping") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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YueHaibing authored
When building CONFIG_DEBUG_FS is not set gcc warn this: drivers/spi/spi-bcm2835aux.c: In function bcm2835aux_spi_probe: drivers/spi/spi-bcm2835aux.c:591:2: error: too many arguments to function bcm2835aux_debugfs_create bcm2835aux_debugfs_create(bs, dev_name(&pdev->dev)); ^~~~~~~~~~~~~~~~~~~~~~~~~ drivers/spi/spi-bcm2835aux.c:145:13: note: declared here static void bcm2835aux_debugfs_create(struct bcm2835aux_spi *bs) Reported-by: Hulk Robot <hulkci@huawei.com> Fixes: 8048d151 ("spi: bcm2835aux: add driver stats to debugfs") Signed-off-by: YueHaibing <yuehaibing@huawei.com> Reviewed-by: Mukesh Ojha <mojha@codeaurora.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sergei Shtylyov authored
The 'status' local variable is initialized but this value is never used, thus kill that initializer. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 05 Apr, 2019 13 commits
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Naga Sureshkumar Relli authored
Add support for QSPI controller driver used by Xilinx Zynq SOC. Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Naga Sureshkumar Relli authored
This patch adds the dts binding document for Zynq SOC QSPI controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Andrey Smirnov authored
There's no code using 'pdev' field in struct spi_gpio. Drop it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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Andrey Smirnov authored
The logic of setting mflags in spi_gpio_request() is very simple and there isn't much benefit in having it in that function. Move all of that code outside into spi_gpio_probe() in order to simplify things. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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Andrey Smirnov authored
Move code calling spi_get_gpio_descs() to happen after ctlr->dev's name is set in order to have proper GPIO consumer names. Before: cat /sys/kernel/debug/gpio gpiochip0: GPIOs 0-31, parent: platform/40049000.gpio, vf610-gpio: gpio-6 ( |regulator-usb0-vbus ) out lo gpiochip1: GPIOs 32-63, parent: platform/4004a000.gpio, vf610-gpio: gpio-36 ( |scl ) in hi gpio-37 ( |sda ) in hi gpio-40 ( |(null) CS1 ) out lo gpio-41 ( |(null) CS0 ) out lo ACTIVE LOW gpio-42 ( |miso ) in hi gpio-43 ( |mosi ) in lo gpio-44 ( |sck ) out lo After: cat /sys/kernel/debug/gpio gpiochip0: GPIOs 0-31, parent: platform/40049000.gpio, vf610-gpio: gpio-6 ( |regulator-usb0-vbus ) out lo gpiochip1: GPIOs 32-63, parent: platform/4004a000.gpio, vf610-gpio: gpio-36 ( |scl ) in hi gpio-37 ( |sda ) in hi gpio-40 ( |spi0 CS1 ) out lo gpio-41 ( |spi0 CS0 ) out lo ACTIVE LOW gpio-42 ( |miso ) in hi gpio-43 ( |mosi ) in lo gpio-44 ( |sck ) out lo Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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Andrey Smirnov authored
DT use-case already relies on SPI core to control CS (requested by of_spi_register_master() and controlled spi_set_cs()), so there's no need to try to request those GPIO in spi-gpio code. Change the code such that spi-gpio's CS related code is only used if device is probed via pdata. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Mark Brown <broonie@kernel.org> Cc: Chris Healy <cphealy@gmail.com> Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
This patch sets SPI device id from the device tree as the bus number. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
Packed mode expects minimum transfer length of 4 bytes. This patch fixes this by using unpacked mode for transfers less than 4 bytes. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
Tegra SPI supports 4 through 32 bits per word. This patch sets bits_per_word_mask accordingly to support transfer with these bits per word. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
This patch dumps SPI registers on transfer error or timeout for debug purpose. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Mark Brown authored
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Sowjanya Komatineni authored
This patch moves SPI controller reset out of spin lock. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Sowjanya Komatineni authored
With SW CS, during the transfer completion CS is de-asserted by writing default command1 register value to SPI_COMMAND1 register. With this both mode and CS state are set at the same time and if current transfer mode is different to default SPI mode and if mode change happens prior to CS de-assert, clock polarity can change while CS is active before transfer finishes. This causes Slave to see spurious clock edges resulting in data mismatch. This patch fixes this by de-asserting CS before writing SPI_COMMAND1 to its default value so through out the transfer it will be in same SPI mode. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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- 04 Apr, 2019 4 commits
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Geert Uytterhoeven authored
Convert GPIO chip selects in the Renesas MSIOF SPI driver from legacy GPIO numbers to GPIO descriptors. Notes: - The board file for the SH7724-based Ecovec24 development board now registers a GPIO descriptor lookup, instead of passing a GPIO number through controller_data, - sh_msiof_get_cs_gpios() must release all GPIOs, else spi_get_gpio_descs() cannot claim them during SPI controller registration. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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kbuild test robot authored
Fixes: 5fd917af ("spi: bcm2835aux: make the polling duration limits configurable") Signed-off-by: kbuild test robot <lkp@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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Geert Uytterhoeven authored
While devm_gpiod_get_index_optional() returns NULL if the GPIO is not present (i.e. -ENOENT), it may still return other error codes, like -EPROBE_DEFER. Currently these are not handled, leading to unrecoverable failures later in case of probe deferral: gpiod_set_consumer_name: invalid GPIO (errorpointer) gpiod_direction_output: invalid GPIO (errorpointer) gpiod_set_value_cansleep: invalid GPIO (errorpointer) gpiod_set_value_cansleep: invalid GPIO (errorpointer) gpiod_set_value_cansleep: invalid GPIO (errorpointer) Detect and propagate errors to fix this. Fixes: f3186dd8 ("spi: Optionally use GPIO descriptors for CS GPIOs") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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Geert Uytterhoeven authored
The conversion from GPIO numbers to GPIO descriptors removed the use of spi->controller_data, but forgot to update a comment referring to it. Fixes: 9b00bc7b ("spi: spi-gpio: Rewrite to use GPIO descriptors") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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