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  1. 02 Nov, 2017 1 commit
  3. 01 Nov, 2017 9 commits
  5. 31 Oct, 2017 5 commits
    • Paul Burton's avatar
      MIPS: Fix CM region target definitions · 6a6cba1d
      Paul Burton authored 
      The default CM target field in the GCR_BASE register is encoded with 0
meaning memory & 1 being reserved. However the definitions we use for
those bits effectively get these two values backwards - likely because
they were copied from the definitions for the CM regions where the
target is encoded differently. This results in use setting up GCR_BASE
with the reserved target value by default, rather than targeting memory
as intended. Although we currently seem to get away with this it's not a
great idea to rely upon.

Fix this by changing our macros to match the documentated target values.

The incorrect encoding became used as of commit 9f98f3dd ("MIPS: Add
generic CM probe & access code") in the Linux v3.15 cycle, and was
likely carried forwards from older but unused code introduced by
commit 39b8d525 ("[MIPS] Add support for MIPS CMP platform.") in the
v2.6.26 cycle.

Fixes: 9f98f3dd ("MIPS: Add generic CM probe & access code")
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Reported-by: default avatarMatt Redfearn <matt.redfearn@mips.com>
Reviewed-by: default avatarJames Hogan <jhogan@kernel.org>
Cc: Matt Redfearn <matt.redfearn@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # v3.15+
Patchwork: https://patchwork.linux-mips.org/patch/17562/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      6a6cba1d
    • Matt Redfearn's avatar
      MIPS: generic: Fix compilation error from include asm/mips-cpc.h · 7f005f11
      Matt Redfearn authored 
      Commit e83f7e02 ("MIPS: CPS: Have asm/mips-cps.h include CM & CPC
headers") adds a #error to arch/mips/include/asm/mips-cpc.h if it is
included directly. While this commit replaced almost all direct includes
of mips-cm.h and mips-cpc.h, 2 remain.

With some defconfigs, mips-cps.h is indirectly included before
mips-cpc.h, but in others this results in compilation errors:

In file included from arch/mips/generic/init.c:23:0:
./arch/mips/include/asm/mips-cpc.h:12:3: error: #error Please include
asm/mips-cps.h rather than asm/mips-cpc.h
 # error Please include asm/mips-cps.h rather than asm/mips-cpc.h

In file included from arch/mips/kernel/smp.c:23:0:
./arch/mips/include/asm/mips-cpc.h:12:3: error: #error Please include
asm/mips-cps.h rather than asm/mips-cpc.h
 # error Please include asm/mips-cps.h rather than asm/mips-cpc.h

In both cases, fix this by including mips-cps.h instead.

Fixes: e83f7e02 ("MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers")
Signed-off-by: default avatarMatt Redfearn <matt.redfearn@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/17492/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      7f005f11
    • Matt Redfearn's avatar
      MIPS: Fix exception entry when CONFIG_EVA enabled · c496f3c0
      Matt Redfearn authored 
      Commit 9fef6868 ("MIPS: Make SAVE_SOME more standard") made several
changes to the order in which registers are saved in the SAVE_SOME
macro, used by exception handlers to save the processor state. In
particular, it removed the
move   k1, sp
in the delay slot of the branch testing if the processor is already in
kernel mode. This is replaced later in the macro by a
move   k0, sp
When CONFIG_EVA is disabled, this instruction actually appears in the
delay slot of the branch. However, when CONFIG_EVA is enabled, instead
the RPS workaround of
MFC0	k0, CP0_ENTRYHI
appears in the delay slot. This results in k0 not containing the stack
pointer, but some unrelated value, which is then saved to the kernel
stack. On exit from the exception, this bogus value is restored to the
stack pointer, resulting in an OOPS.

Fix this by moving the save of SP in k0 explicitly in the delay slot of
the branch, outside of the CONFIG_EVA section, restoring the expected
instruction ordering when CONFIG_EVA is active.

Fixes: 9fef6868 ("MIPS: Make SAVE_SOME more standard")
Signed-off-by: default avatarMatt Redfearn <matt.redfearn@mips.com>
Reported-by: default avatarVladimir Kondratiev <vladimir.kondratiev@intel.com>
Reviewed-by: default avatarCorey Minyard <cminyard@mvista.com>
Reviewed-by: default avatarJames Hogan <jhogan@kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/17471/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      c496f3c0
    • James Hogan's avatar
      MIPS: generic: Fix NI 169445 its build · a1286968
      James Hogan authored 
      Since commit 04a85e08 ("MIPS: generic: Move NI 169445 FIT image
source to its own file"), a generic 32r2el_defconfig kernel fails to
build with the following build error:

  ITB     arch/mips/boot/vmlinux.gz.itb
Error: arch/mips/boot/vmlinux.gz.its:111.1-2 syntax error
FATAL ERROR: Unable to parse input tree
mkimage Can't read arch/mips/boot/vmlinux.gz.itb.tmp: Invalid argument

Fix arch/mips/generic/board-ni169445.its.S to include the necessary "/"
node path before the first open brace.

The original issue in arch/mips/generic/vmlinux.its.S was fixed directly
in the original commit 7aacf86b ("MIPS: NI 169445 board support")
after https://patchwork.linux-mips.org/patch/16941/ was submitted, but
the separate its.S file wasn't correctly fixed when resolving the
conflict in commit 04a85e08 ("MIPS: generic: Move NI 169445 FIT
image source to its own file").

Fixes: 04a85e08 ("MIPS: generic: Move NI 169445 FIT image source to its own file")
Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Nathan Sullivan <nathan.sullivan@ni.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17561/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      a1286968
    • Paul Burton's avatar
      Update MIPS email addresses · 48c834be
      Paul Burton authored 
      MIPS will soon not be a part of Imagination Technologies, and as such
many @imgtec.com email addresses will no longer be valid. This patch
updates the addresses for those who:

 - Have 10 or more patches in mainline authored using an @imgtec.com
   email address, or any patches dated within the past year.

 - Are still with Imagination but leaving as part of the MIPS business
   unit, as determined from an internal email address list.

 - Haven't already updated their email address (ie. JamesH) or expressed
   a desire to be excluded (ie. Maciej).

 - Acked v2 or earlier of this patch, which leaves Deng-Cheng, Matt &
   myself.

New addresses are of the form firstname.lastname@mips.com, and all
verified against an internal email address list. An entry is added to
.mailmap for each person such that get_maintainer.pl will report the new
addresses rather than @imgtec.com addresses which will soon be dead.

Instances of the affected addresses throughout the tree are then
mechanically replaced with the new @mips.com address.
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Cc: Deng-Cheng Zhu <dengcheng.zhu@mips.com>
Acked-by: default avatarDengcheng Zhu <dengcheng.zhu@mips.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Matt Redfearn <matt.redfearn@mips.com>
Acked-by: default avatarMatt Redfearn <matt.redfearn@mips.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: trivial@kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17540/Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
      48c834be
  7. 29 Oct, 2017 25 commits
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