- 23 Feb, 2024 40 commits
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Andreas Kemnade authored
If the system-power-controller property is there, enable power off. Implementation is based on a Linux v3.0 vendor kernel. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Link: https://lore.kernel.org/r/20240217082007.3238948-3-andreas@kemnade.infoSigned-off-by: Lee Jones <lee@kernel.org>
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Andreas Kemnade authored
Add system-power-controller property because these chips can power off the device. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240217082007.3238948-2-andreas@kemnade.infoSigned-off-by: Lee Jones <lee@kernel.org>
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Peter Griffin authored
of_parse_phandle() returns a device_node with refcount incremented, which the callee needs to call of_node_put() on when done. We should only call of_node_put() when the property argument is provided though as otherwise nothing has taken a reference on the node. Fixes: f36e789a ("mfd: altera-sysmgr: Add SOCFPGA System Manager") Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240220115012.471689-4-peter.griffin@linaro.orgSigned-off-by: Lee Jones <lee@kernel.org>
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Peter Griffin authored
The kernel coding style does not require 'extern' in function prototypes in .h files, so remove them as they are not needed. To avoid checkpatch warnings such as CHECK: Lines should not end with a '(' +struct regmap *syscon_regmap_lookup_by_phandle( The indentation is also updated. No functional changes in this patch. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240220115012.471689-3-peter.griffin@linaro.orgSigned-off-by: Lee Jones <lee@kernel.org>
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Peter Griffin authored
of_parse_phandle() returns a device_node with refcount incremented, which the callee needs to call of_node_put() on when done. We should only call of_node_put() when the property argument is provided though as otherwise nothing has taken a reference on the node. Fixes: 45330bb4 ("mfd: syscon: Allow property as NULL in syscon_regmap_lookup_by_phandle") Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240220115012.471689-2-peter.griffin@linaro.orgSigned-off-by: Lee Jones <lee@kernel.org>
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Geert Uytterhoeven authored
Use the FIELD_GET() helper, instead of defining a custom macro implementing the same operation. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/ef7d5fc3d867338520392417cdf2b67ba19aecde.1708002264.git.geert+renesas@glider.beSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-19-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-18-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-17-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-16-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-15-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-14-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-13-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://lore.kernel.org/r/20240206071314.8721-12-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240206071314.8721-11-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Tested-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240206071314.8721-10-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20240206071314.8721-9-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-8-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-7-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-6-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-5-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-4-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-3-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Bo Liu authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. Signed-off-by: Bo Liu <liubo03@inspur.com> Link: https://lore.kernel.org/r/20240206071314.8721-2-liubo03@inspur.comSigned-off-by: Lee Jones <lee@kernel.org>
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Ricardo B. Marliere authored
Now that the driver core can properly handle constant struct bus_type, move the mcp_bus_type variable to be a constant structure as well, placing it into read-only memory which can not be modified at runtime. Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: "Ricardo B. Marliere" <ricardo@marliere.net> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20240204-bus_cleanup-mfd-v1-1-07335ebc034f@marliere.netSigned-off-by: Lee Jones <lee@kernel.org>
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Charles Keepax authored
Including some missing headers. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240129152557.3221212-1-ckeepax@opensource.cirrus.comSigned-off-by: Lee Jones <lee@kernel.org>
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Andrew Davis authored
Add TI SERDES control registers compatible. This is a region found in the TI AM65 CTRL_MMR0 register space[0]. Each instance is used to control a SERDES clock and lane select mux. [0] https://www.ti.com/lit/pdf/spruid7Signed-off-by: Andrew Davis <afd@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240205174736.27749-1-afd@ti.comSigned-off-by: Lee Jones <lee@kernel.org>
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Siddharth Vadapalli authored
The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC are used to configure the link speed, lane count and mode of operation of the respective PCIe instance. Add compatible for allowing the PCIe driver to obtain a regmap for the PCIE_CTRL register within the System Controller device-tree node in order to configure the PCIe instance accordingly. The Technical Reference Manual for J784S4 SoC with details of the PCIE_CTRL registers is available at: https://www.ti.com/lit/zip/spruj52Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240204090336.3209063-1-s-vadapalli@ti.comSigned-off-by: Lee Jones <lee@kernel.org>
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Dharma Balasubiramani authored
Convert the atmel,hlcdc binding to DT schema format. Align clocks and clock-names properties to clearly indicate that the LCD controller expects lvds_pll_clk when interfaced with the lvds display. This alignment with the specific hardware requirements ensures accurate device tree configuration for systems utilizing the HLCDC IP. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20240202001733.91455-4-dharma.b@microchip.comSigned-off-by: Lee Jones <lee@kernel.org>
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Charles Keepax authored
As it devm_pm_runtime_enable() can fail due to memory allocations, it is best to handle the error. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240129152557.3221212-6-ckeepax@opensource.cirrus.comSigned-off-by: Lee Jones <lee@kernel.org>
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Charles Keepax authored
Use of dev_err_probe() was missed in the i2c and sdw parts of the code, update the missing parts. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240129152557.3221212-5-ckeepax@opensource.cirrus.comSigned-off-by: Lee Jones <lee@kernel.org>
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Charles Keepax authored
Make the defines a little clearer by adding time based postfixes. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240129152557.3221212-4-ckeepax@opensource.cirrus.comSigned-off-by: Lee Jones <lee@kernel.org>
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Charles Keepax authored
__xxx is the preferred type for firmware interfaces. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240129152557.3221212-3-ckeepax@opensource.cirrus.comSigned-off-by: Lee Jones <lee@kernel.org>
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Charles Keepax authored
Use more forward declarations, move header guards to cover other includes, and rely less on including headers through other headers. Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20240129152557.3221212-2-ckeepax@opensource.cirrus.comSigned-off-by: Lee Jones <lee@kernel.org>
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Maciej Strozek authored
Current code executes only once despite the while loop, so remove the loop. Also msleep(1) will likely result in a larger sleep, so increase its value for clarity while keeping the same behaviour. Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20240123154259.81258-1-mstrozek@opensource.cirrus.comSigned-off-by: Lee Jones <lee@kernel.org>
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Simon Horman authored
Although it does not seem to have any untoward side-effects, the use of ';' to separate to assignments seems more appropriate than ','. Flagged by clang-17 -Wcomma No functional change intended. Compile tested only. Signed-off-by: Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/r/20240123-rave-sp-comma-v1-1-84e9b15ba205@kernel.orgSigned-off-by: Lee Jones <lee@kernel.org>
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Lukasz Majczak authored
Add ChromeOS EC-based watchdog as EC subdevice. Signed-off-by: Lukasz Majczak <lma@chromium.org> Link: https://lore.kernel.org/r/20240119084328.3135503-4-lma@chromium.orgSigned-off-by: Lee Jones <lee@kernel.org>
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Dmitry Baryshkov authored
Add qcom,qcm2290-tcsr and qcom,sm6115-tcsr, compatibles for TCSR blocks on the corresponding platforms. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240116-usbc-phy-vls-clamp-v1-1-73b2da7691c5@linaro.orgSigned-off-by: Lee Jones <lee@kernel.org>
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Krzysztof Kozlowski authored
dtschema package defines firmware-name as string-array, so individual bindings should not make it a string but instead just narrow the number of expected firmware file names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Jeff LaBundy <jeff@labundy.com> Link: https://lore.kernel.org/r/20240115182042.1610134-1-krzysztof.kozlowski@linaro.orgSigned-off-by: Lee Jones <lee@kernel.org>
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Lee Jones authored
Avoid these nasty W=1 errors: drivers/mfd/omap-usb-host.c: In function ‘usbhs_omap_probe’: drivers/mfd/omap-usb-host.c:706:54: error: ‘_clk’ directive output may be truncated writing 4 bytes into a region of size between 1 and 11 [-Werror=format-truncation=] drivers/mfd/omap-usb-host.c:705:17: note: ‘snprintf’ output between 24 and 34 bytes into a destination of size 30 drivers/mfd/omap-usb-host.c:721:56: error: ‘%d’ directive output may be truncated writing between 1 and 11 bytes into a region of size 8 [-Werror=format-truncation=] drivers/mfd/omap-usb-host.c:721:33: note: directive argument in the range [-2147483640, 2147483647] drivers/mfd/omap-usb-host.c:720:17: note: ‘snprintf’ output between 28 and 38 bytes into a destination of size 30 drivers/mfd/omap-usb-host.c:731:55: error: ‘%d’ directive output may be truncated writing between 1 and 11 bytes into a region of size 9 [-Werror=format-truncation=] drivers/mfd/omap-usb-host.c:731:33: note: directive argument in the range [-2147483640, 2147483647] drivers/mfd/omap-usb-host.c:730:17: note: ‘snprintf’ output between 27 and 37 bytes into a destination of size 30 Cc: Tony Lindgren <tony@atomide.com> Cc: Keshava Munegowda <keshava_mgowda@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: linux-omap@vger.kernel.org Signed-off-by: Lee Jones <lee@kernel.org>
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