Pull "mvebu dt for 4.11 (part 3)" from Gregory CLEMENT:

adjust name of sd-mmc-gop clock in sysco for Armada 7K/8K

* tag 'mvebu-dt64-4.11-3' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon

Merge tag 'qcom-arm64-for-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Pull "Qualcomm ARM64 Updates for v4.11 Part 2" from Andy Gross:

* Add CoreSight nodes for MSM8916

* tag 'qcom-arm64-for-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: qcom: Add msm8916 CoreSight components

Merge tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt64

Pull "Allwinner arm64 changes for 4.11" from Maxime Ripard:

Some patches related the arm64 Allwinner SoCs, most notably:
  - Support for the MMC
  - Suport for the USB and mUSB controllers
  - New boards: Bananapi M64

* tag 'sunxi-dt64-for-4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  arm64: allwinner: add BananaPi-M64 support
  arm64: allwinner: a64: add UART1 pin nodes
  arm64: allwinner: pine64: add MMC support
  arm64: allwinner: a64: Increase the MMC max frequency
  arm64: allwinner: a64: Add MMC pinctrl nodes
  arm64: allwinner: a64: Add MMC nodes
  arm64: dts: allwinner: Remove no longer used pinctrl/sun4i-a10.h header
  arm64: dts: enable the MUSB controller of Pine64 in host-only mode
  arm64: dts: add MUSB node to Allwinner A64 dtsi
  arm64: dts: allwinner: enable EHCI1, OHCI1 and USB PHY nodes in Pine64
  arm64: dts: allwinner: sort the nodes in sun50i-a64-pine64.dts
  arm64: dts: allwinner: add USB1-related nodes of Allwinner A64

Add initial set of CoreSight components found on Qualcomm msm8916 and
apq8016 based platforms, including the DragonBoard 410c board.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

This commit adjusts the names of gatable clock #18 of the Marvell Armada
CP110 system controller. This clock not only controls SD/MMC, but also
the GOP (Group Of Ports) used for networking. So the clock is renamed to
{cpm,cps}-sd-mmc-gop instead of {cpm,cps}-sd-mmc.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Merge tag 'samsung-dt64-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64

Samsung DeviceTree ARM64 update for v4.11, second round:
1. Use proper drive strengths on Exynos7.
2. Fix significant current leak on Exynos5433-based TM2/TM2E due
   to disabled regulator.
3. Add touchkey to TM2, set display clocks for Ultra HD modes.
4. Cleanups and minor fixes for Exynos5433, TM2 and TM2E.

* tag 'samsung-dt64-4.11-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: Add clocks to Exynos5433 LPASS module
  arm64: dts: exynos: set LDO7 regulator as always on
  arm64: dts: exynos: configure TV path clocks for Ultra HD modes
  arm64: dts: exynos: Fix drive strength of sd0_xxx pin definitions
  arm64: dts: exynos: Disable pull down for audio pins in Exynos5433 SoCs
  arm64: dts: exynos: Add TM2 touchkey node
  arm64: dts: exynos: Remove unneeded unit names in Exynos5433 nodes
Signed-off-by: Olof Johansson <olof@lixom.net>

The Banana Pi M64 board is a typical single board computer based on the
Allwinner A64 SoC. Aside from the usual peripherals it features eMMC
storage, which is connected to the 8-bit capable SDHC2 controller.
Also it has a soldered WiFi/Bluetooth chip, so we enable UART1 and SDHC1
as those two interfaces are connected to it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

On many boards UART1 connects to a Bluetooth chip, so add the pinctrl
nodes for the only pins providing access to that UART. That includes
those pins for hardware flow control (RTS/CTS).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

All Pine64 boards connect an micro-SD card slot to the first MMC
controller.
Enable the respective DT node and specify the (always-on) regulator
and card-detect pin.
As a micro-SD slot does not feature a write-protect switch, we disable
this feature.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

The eMMC controller seem to have a maximum frequency of 200MHz, while the
regular MMC controllers are capped at 150MHz.

Since older SoCs cannot go that high, we cannot change the default maximum
frequency, but fortunately for us we have a property for that in the DT.

This also has the side effect of allowing to use the MMC HS200 and SD
SDR104 modes for the boards that support it (with either 1.2v or 1.8v IOs).
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>

The A64 only has a single set of pins for each MMC controller. Since we
already have boards that require all of them, let's add them to the DTSI.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>

The A64 has 3 MMC controllers, one of them being especially targeted to
eMMC. Among other things, it has a data strobe signal and a 8 bits data
width.

The two other are more usual controllers that will have a 4 bits width at
most and no data strobe signal, which limits it to more usual SD or MMC
peripherals.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Acked-by: Chen-Yu Tsai <wens@csie.org>

Merge tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

ZTE arm64 device tree update for 4.11:
 - Enable cpufreq support for zx296718 by using new operating-points-v2
   bindings, so that it works with the generic cpufreq-dt driver.

* tag 'zte-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: zx: support cpu-freq for zx296718
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64

Freescale arm64 device tree updates for 4.11:
 - Add support for LS1012A SoC which is an ARMv8 SoC with single
   Cortex-A53 core, and the corresponding board support: FRDM, QDS
   and RDB.
 - Enable TMU (Thermal Monitoring Unit) support for LS1046A SoC.
 - Enable PCA9547 device for ls2080a-rdb board by removing 'disabled'
   status setting.

* tag 'imx-dt64-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  dt-bindings: clockgen: Add compatible string for LS1012A
  Documentation: DT: add LS1012A compatible for SCFG and DCFG
  Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards
  arm64: dts: ls1046a: Add TMU device tree support
  arm64: dts: Add support for FSL's LS1012A SoC
  arm64: dts: ls2080a-rdb: remove disable status of pca9547
Signed-off-by: Olof Johansson <olof@lixom.net>

mvebu dt64 for 4.11 (part 2)

- Add a new Armada 8K based board: MACCHIATOBin
- Enable AHCI on the Armada 7K/8K SoCs

* tag 'mvebu-dt64-4.11-2' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
  arm64: dts: marvell: Add DT for MACCHIATOBin board
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt64

arm64: tegra: Device tree changes for v4.11-rc1

This contains three patches that reintroduce symbolic identifiers for
clocks, resets and mailboxes. These had been converted to literals in
the v4.10 release to avoid complicated dependencies between branches.

* tag 'tegra-for-4.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Use symbolic reset identifiers
  arm64: tegra: Use symbolic clock identifiers
  arm64: tegra: Use symbolic HSP identifiers
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64

Second Round of Renesas ARM64 Based SoC DT Updates for v4.11

r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
  - They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support

r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA

r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796

* tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7796: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: tidyup audma definition order
  arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7796: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add missing power-domains property for sata
  arm64: dts: h3ulcb: follow sound CTU/MIX supports
Signed-off-by: Olof Johansson <olof@lixom.net>

ARM64: DT: Hisilicon SoC DT updates for 4.11

- Add binding for Hi3660 SoC and HiKey960 Board
- Add binding for ARM Cortex-A73
- Add dts files for HiKey960 development board

* tag 'hisi-arm64-dt-for-4.11' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: Add dts files for Hisilicon Hi3660 SoC
  dt-bindings: Add a support cpu type for cortex-a73
  document: dt: add binding for Hi3660 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>

For mt8173:
- set mm_sel clock to 400 MHz to support 4K HDMI
- adjust power efficiency between the little and big cores
- add a node for thermal calibration via e-fuse data

* tag 'v4.10-next-dts' of https://github.com/mbgg/linux-mediatek:
  arm64: dts: mt8173: add node for thermal calibration
  arm64: dts: mt8173: Fix cpu_thermal cooling-maps contributions
  arm64: dts: mt8173: add mmsel clocks for 4K support
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64

Qualcomm ARM64 Updates for v4.11

* Add Vol+ support for DB820C and APQ8016
* Add HDMI audio support for APQ8016
* Fix DB820C GPIO pinctrl name
* Enable WCNSS on MSM8916
* Add SCM node for MSM8996
* Use fixed XO clock on MSM8916

* tag 'qcom-arm64-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  arm64: dts: db820c: add support to volume up key
  arm64: dts: apq8016-sbc: Limit MPP4 high state to 1.8V
  arm64: dts: apq8016-sbc: Add Volume Up key device node
  arm64: dts: apq8016-sbc: add support to hdmi audio via adv7533
  arm64: dts: db820c: fix gpio pinctrl name correctly
  ARM: dts: msm8916: Add and enable wcnss node
  arm64: dts: msm8996: Add SCM DT node
  arm64: dts: qcom: msm8916: Use fixed factor xo clock
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'uniphier-dt64-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt64

UniPhier ARM64 SoC DT updates for v4.11

- Add an SD reset controller node for LD11 SoC
- Add an eMMC controller node for LD11/LD20 SoC

* tag 'uniphier-dt64-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  arm64: dts: uniphier: add eMMC controller node for LD11/LD20
  arm64: dts: uniphier: add SD-ctrl node for LD11 SoC
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

64bit dts changes with some adjustments to the pcie controller,
usb clocks, grf phandles for the rk3399 CRUs, epd pinctrl settings,
a phandle to the rk3399 tsadc and converting boards to use the
recently introduced pin constants.

* tag 'v4.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: add rockchip,grf property for RK3399 PMUCRU/CRU
  arm64: dts: rockchip: add aspm-no-l0s for rk3399
  arm64: dts: rockchip: add max-link-speed for rk3399
  arm64: dts: rockchip: use pin constants to describe gpios
  arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399
  arm64: dts: rockchip: add rk3399 eDP HPD pinctrl
  arm64: dts: rockchip: add rk3399 thermal_zones phandle
Signed-off-by: Olof Johansson <olof@lixom.net>

Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

Testing with an Armada 8040 board shows that adding the generic-ahci
compatible to the CP110 AHCI nodes gets us working AHCI on the board.
A previous patch series posted by Thomas Petazzoni was retracted when
it was realised that the IP was supposed to be, and is, compatible
with the standard register layout.

Add this compatible.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Now that the corresponding device tree binding include has been merged,
convert the DTS files to use symbolic names instead of numeric ones.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.

Fixes: 8e8b9eae ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.

Fixes: a92843c8 ("arm64: dts: r8a7795: add EthernetAVB device node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
Because of this order, dma can connect to ipmmu, but
audma can't connect to it.
This patch moves audma order as ipmmu -> dma -> audma.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.

Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
Signed-off-by: Thao Nguyen <thao.nguyen.yb@rvc.renesas.com>
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
Signed-off-by: Thao Nguyen <thao.nguyen.yb@rvc.renesas.com>
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This went unnoticed as the sata_rcar driver doesn't support Runtime PM
yet, but manages module clocks manually.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Exynos5433 LPASS module requires some clocks for proper operation with
power domain.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.

Remove the #include entry with the following command:

    sed -i -e '/pinctrl\/sun4i-a10.h/D' \
	arch/arm64/boot/dts/allwinner/*.dts?
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>

Add initial dtsi file to support Hisilicon Hi3660 SoC with
support of Octal core CPUs in two clusters(4 * A53 & 4 * A73).

Also add dts file to support HiKey960 development board which
based on Hi3660 SoC.
The output console is earlycon "earlycon=pl011,0xfdf05000".
And the con_init uart5 with a fixed clock, which already
configured at bootloader.

When clock is available, the uart5 will be modified.

Tested on HiKey960 Board.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

Add arm cpu type cortex-a73
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>

Add binding for hisilicon Hi3660 SoC and HiKey960 Board.
Signed-off-by: Chen Feng <puck.chen@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>