1. 05 Feb, 2015 9 commits
  2. 04 Feb, 2015 3 commits
  3. 03 Feb, 2015 2 commits
  4. 26 Jan, 2015 3 commits
  5. 19 Jan, 2015 1 commit
  6. 18 Jan, 2015 4 commits
  7. 13 Jan, 2015 15 commits
  8. 23 Dec, 2014 3 commits
    • Jürg Billeter's avatar
      dmaengine: rcar-dmac: Handle hardware descriptor allocation failure · ee4b876b
      Jürg Billeter authored
      If the atomic DMA coherent pool is too small, disable use of hardware
      descriptor lists instead of crashing the system:
      
      ERROR: 256 KiB atomic DMA coherent pool is too small!
      Please increase it with coherent_pool= kernel parameter!
      
      Unable to handle kernel NULL pointer dereference at virtual address 00000004
      Internal error: Oops: a07 [#1] PREEMPT SMP ARM
      
      PC is at rcar_dmac_chan_reinit+0x3c/0x160
      LR is at _raw_spin_lock_irqsave+0x18/0x5c
      
      [<802132c0>] (rcar_dmac_chan_reinit) from [<80214818>] (rcar_dmac_isr_error+0x84/0xa0)
      [<80214818>] (rcar_dmac_isr_error) from [<80060484>] (handle_irq_event_percpu+0x50/0x150)
      [<80060484>] (handle_irq_event_percpu) from [<800605c0>] (handle_irq_event+0x3c/0x5c)
      [<800605c0>] (handle_irq_event) from [<8006350c>] (handle_fasteoi_irq+0xb8/0x198)
      [<8006350c>] (handle_fasteoi_irq) from [<8005fdb0>] (generic_handle_irq+0x20/0x30)
      [<8005fdb0>] (generic_handle_irq) from [<8000fcd0>] (handle_IRQ+0x50/0xc4)
      [<8000fcd0>] (handle_IRQ) from [<800092cc>] (gic_handle_irq+0x28/0x5c)
      [<800092cc>] (gic_handle_irq) from [<80012700>] (__irq_svc+0x40/0x70)
      
      Kernel panic - not syncing: Fatal exception in interrupt
      Signed-off-by: default avatarJürg Billeter <j@bitron.ch>
      Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
      ee4b876b
    • Laurent Pinchart's avatar
      dmaengine: rcar-dmac: Cache hardware descriptors memory · 1ed1315f
      Laurent Pinchart authored
      Unlike DMA transfers descriptors that are preallocated and cached,
      memory used to store hardware descriptors is allocated and freed with
      the DMA coherent allocation API for every transfer. Besides degrading
      performances, this creates a CMA stress test that seems to cause issues.
      Running dmatest with the noverify option produces
      
      [   50.066539] alloc_contig_range test_pages_isolated(6b845, 6b846) failed
      [   50.235180] alloc_contig_range test_pages_isolated(6b848, 6b84e) failed
      [   52.964584] alloc_contig_range test_pages_isolated(6b847, 6b848) failed
      [   54.127113] alloc_contig_range test_pages_isolated(6b843, 6b844) failed
      [   56.270253] alloc_contig_range test_pages_isolated(6b84c, 6b850) failed
      
      The root cause needs to be fixed, but in the meantime, as a workaround
      and a performance improvement, cache hardware descriptors.
      Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
      Tested-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
      1ed1315f
    • Laurent Pinchart's avatar
      dmaengine: rcar-dmac: Implement support for hardware descriptor lists · ccadee9b
      Laurent Pinchart authored
      The DMAC supports hardware-based auto-configuration from descriptor
      lists. This reduces the number of interrupts required for processing a
      DMA transfer. Support that mode in the driver.
      Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
      Tested-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
      ccadee9b