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  1. 30 Jul, 2002 1 commit
    • Deepak Saxena's avatar
      [ARM PATCH] 1215/1: Vector relocation not being disabled at reset · 2d33b87d
      Deepak Saxena authored
      This patch solves the problem of soft reboots on Iq80310, IQ80321, and BRH
      platforms.  The problem was that during the RedBoot PCI scan, we were getting
      data aborts due to non-existent PCI devices.  It looks like redboot doesn't
      cleanup after us and turn of vector relocation, so we were jumping off into
      nowhere.
      2d33b87d
  2. 10 Jul, 2002 1 commit
    • Russell King's avatar
      [ARM] page fault handling updates · 5f563f59
      Russell King authored
      - FSR "write" bit moved from bit 8 to bit 11.
      - Handle bit 10 of FSR for xscale imprecise aborts.
      - Allow Xscale CP0 and CP13 accesses.
      - Move Xscale specific implementations to their own file.
      5f563f59
  3. 17 Apr, 2002 1 commit
    • Russell King's avatar
      2.5.8 ARM updates: · 0822977d
      Russell King authored
       - preempt updates
       - build fixes
       - new tlb flush macro
       - add asm/cacheflush.h and asm/tlbflush.h
      0822977d
  4. 22 Mar, 2002 1 commit
  5. 10 Mar, 2002 3 commits
  6. 28 Feb, 2002 1 commit
  7. 25 Feb, 2002 1 commit
    • Russell King's avatar
      Clean up ARM TLB handling code; previously there was a lot of code · a6560a26
      Russell King authored
      replication across each processor type, each handling alignment of
      addresses slightly differently.  We unify this mess, and allow for
      greater flexibility in the per-CPU architecture TLB handlers.
      
      We also start to remove the ARM cache.h -> cpu_*.h -> proc-fns.h mess
      making the code cleaner and easier to follow.
      
      Documentation describing the expected behaviour of each TLB function
      for the 32-bit ARM processors is also included.
      a6560a26
  8. 05 Feb, 2002 1 commit