- 30 Jun, 2021 6 commits
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Wei Li authored
When 32-bit MIPS huge page support is enabled, we halve the number of pointers a PTE page holds, making its last half go to waste. Correspondingly, we should halve the number of kmap entries, as we just initialized only a single pte table for that in pagetable_init(). Fixes: 35476311 ("MIPS: Add partial 32-bit huge page support") Signed-off-by:
Wei Li <liwei391@huawei.com> Signed-off-by:
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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周琰杰 (Zhou Yanjie) authored
1.Add a new TCU channel as the percpu timer of core1, this is to prepare for the subsequent SMP support. The newly added channel will not adversely affect the current single-core state. 2.Adjust the position of TCU node to make it consistent with the order in jz4780.dtsi file. Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20 Signed-off-by:
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Acked-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
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周琰杰 (Zhou Yanjie) authored
The original clock (3 MHz) is too fast for the clocksource, there will be a chance that the system may get stuck. Reported-by:
Nikolaus Schaller <hns@goldelico.com> Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20 Signed-off-by:
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周琰杰 (Zhou Yanjie) authored
Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic. Signed-off-by:
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周琰杰 (Zhou Yanjie) authored
Update the CGU binding documentation, add mac-phy-ctrl as a pattern property. Signed-off-by:
Stephen Boyd <sboyd@kernel.org> Signed-off-by:
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周琰杰 (Zhou Yanjie) authored
If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N * X) cells. Signed-off-by:
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- 29 Jun, 2021 3 commits
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Nick Desaulniers authored
Clang's integrated assembler only accepts these instructions when the cpu is set to mips32r5. With this change, we can assemble malta_defconfig with Clang via `make LLVM_IAS=1`. Link: https://github.com/ClangBuiltLinux/linux/issues/763Reported-by:
Dmitry Golovin <dima@golovin.in> Signed-off-by:
Nick Desaulniers <ndesaulniers@google.com> Signed-off-by:
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zhanglianjie authored
The cause of the problem is as follows: 1. when cat /sys/devices/system/memory/memory0/valid_zones, test_pages_in_a_zone() will be called. 2. test_pages_in_a_zone() finds the zone according to stat_pfn = 0. The smallest pfn of the numa node in the mips architecture is 128, and the page corresponding to the previous 0~127 pfn is not initialized (page->flags is 0xFFFFFFFF) 3. The nid and zonenum obtained using page_zone(pfn_to_page(0)) are out of bounds in the corresponding array, &NODE_DATA(page_to_nid(page))->node_zones[page_zonenum(page)], access to the out-of-bounds zone member variables appear abnormal, resulting in Oops. Therefore, it is necessary to keep the page between 0 and the minimum pfn to prevent Oops from appearing. Signed-off-by:
zhanglianjie <zhanglianjie@uniontech.com> Signed-off-by:
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Paul Cercueil authored
MIPS MT extensions were added with the MIPS 34K processor, which was based on the MIPS32r2 ISA. This fixes a build error when building a generic kernel for a MIPS32r1 CPU. Fixes: c434b9f8 ("MIPS: Kconfig: add MIPS_GENERIC_KERNEL symbol") Cc: stable@vger.kernel.org # v5.9 Signed-off-by:
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- 21 Jun, 2021 4 commits
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zhouchuangao authored
BUG_ON uses unlikely in if(), it can be optimized at compile time. Usually, the condition in if() is not satisfied. In my opinion, this can improve the efficiency of the multi-stage pipeline. Signed-off-by:
zhouchuangao <zhouchuangao@vivo.com> Signed-off-by:
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Yang Yingliang authored
Remove unneeded error handling on the result of a call to platform_get_resource() when the value is passed to devm_ioremap_resource(). And use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Signed-off-by:
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Huang Pei authored
This fixes Page Table accounting bug. MIPS is the ONLY arch just defining __HAVE_ARCH_PMD_ALLOC_ONE alone. Since commit b2b29d6d (mm: account PMD tables like PTE tables), "pmd_free" in asm-generic with PMD table accounting and "pmd_alloc_one" in MIPS without PMD table accounting causes PageTable accounting number negative, which read by global_zone_page_state(), always returns 0. Signed-off-by:
Huang Pei <huangpei@loongson.cn> Signed-off-by:
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Tom Rix authored
checkpatch looks for SPDX-License-Identifier. So change the '_' to '-' Signed-off-by:
Tom Rix <trix@redhat.com> Signed-off-by:
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- 01 Jun, 2021 11 commits
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Paul Cercueil authored
Add a 1 MiB memory area dedicated to the video driver. This area will be managed by Linux' CMA, so that the ingenic-drm driver can be sure to always be able to allocate contiguous buffers. Signed-off-by:
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Paul Cercueil authored
When using the FM radio, we must not have capacitors on the headphones line, since it is used as the antenna. The "FM Radio" widget is removed so that the cap-less mode can be enabled dynamically through DAPM when the line input is used. This widget was useless anyway. Signed-off-by:
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Paul Cercueil authored
The "ingenic,jz4780-i2c" should have "ingenic,jz4770-i2c" as a fallback compatible, as per the Device Tree documentation found in Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml. Signed-off-by:
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Paul Cercueil authored
The clock driving the XBurst CPUs in Ingenic SoCs is integer divided from the main PLL. As such, it is possible to control the frequency of the CPU, either by changing the divider, or by changing the rate of the main PLL. The XBurst CPUs also lack the CP0 timer; the TCU, a separate piece of hardware in the SoC, provides this functionality. Signed-off-by:
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Paul Cercueil authored
The MACH_INGENIC_GENERIC config option must select all SoCs, in order for all the SoC-specific drivers to become available. Signed-off-by:
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Paul Cercueil authored
Ingenic JZ4760 and JZ4760B do have a FPU, but the config registers don't report it. Force the FPU detection in case the processor ID match the JZ4760(B) one. Signed-off-by:
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Paul Cercueil authored
Allow specifying from the config the UART to use on Ingenic SoCs when compressed kernel debugging is enabled. Signed-off-by:
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Paul Cercueil authored
I am not sure why this is required, but if this is not enabled, reading from a buffer in which data has been DMA'd may read incorrect values. This used to happen for instance in mmc_app_send_scr() (drivers/mmc/core/sd_ops.c), where data is DMA'd to a buffer then copied by the CPU to a different location. Signed-off-by:
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Masahiro Yamada authored
Use pattern rules to unify similar build rules among n32, n64, and o32. Signed-off-by:
Masahiro Yamada <masahiroy@kernel.org> Signed-off-by:
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Masahiro Yamada authored
There is no good reason to generate the syscall offset macros by scripting since they are not derived from the syscall tables. Define __NR_*_Linux macros directly in arch/mips/include/asm/unistd.h, and clean up the Makefile and the shell script. Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
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Tiezhu Yang authored
Make some functions static to fix the following sparse warnings: arch/mips/loongson64/smp.c:54:5: sparse: sparse: symbol 'ipi_read_clear' was not declared. Should it be static? arch/mips/loongson64/smp.c:55:6: sparse: sparse: symbol 'ipi_write_action' was not declared. Should it be static? arch/mips/loongson64/smp.c:56:6: sparse: sparse: symbol 'ipi_write_enable' was not declared. Should it be static? arch/mips/loongson64/smp.c:57:6: sparse: sparse: symbol 'ipi_clear_buf' was not declared. Should it be static? arch/mips/loongson64/smp.c:58:6: sparse: sparse: symbol 'ipi_write_buf' was not declared. Should it be static? Fixes: fed4955f ("MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU") Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by:
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- 27 May, 2021 11 commits
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zhaoxiao authored
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by:
zhaoxiao <zhaoxiao@uniontech.com> Signed-off-by:
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zhaoxiao authored
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by:
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zhaoxiao authored
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000" Signed-off-by:
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zhaoxiao authored
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64g-package.dtsi:42.30-49.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e0: simple-bus unit address format error, expected "1fe00100" arch/mips/boot/dts/loongson/loongson64g-package.dtsi:51.30-59.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e8: simple-bus unit address format error, expected "1fe00110" Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by:
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zhaoxiao authored
Fixes the following W=1 kernel build warning(s): arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:26.9-32.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Signed-off-by:
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Tiezhu Yang authored
Some configs in loongson3_defconfig is invalid or needless, use the following steps to update it: make loongson3_defconfig make savedefconfig cp defconfig arch/mips/configs/loongson3_defconfig Signed-off-by:
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Huacai Chen authored
This fix build warning: arch/mips/loongson64/env.c: In function 'prom_init_env': >> arch/mips/loongson64/env.c:50:14: warning: variable 'device' set but not used [-Wunused-but-set-variable] 50 | u16 vendor, device; | ^~~~~~ {standard input}: Assembler messages: {standard input}:788: Error: found '(', expected: ')' {standard input}:788: Error: found '(', expected: ')' {standard input}:788: Error: non-constant expression in ".if" statement {standard input}:788: Error: junk at end of line, first unrecognized character is `(' {standard input}:801: Error: found '(', expected: ')' {standard input}:801: Error: found '(', expected: ')' {standard input}:801: Error: non-constant expression in ".if" statement {standard input}:801: Error: junk at end of line, first unrecognized character is `(' Reported-by:Huacai Chen <chenhuacai@loongson.cn> Signed-off-by:
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Oleksij Rempel authored
Both, MAC and switch support flow control, so add pause property for the MAC <> switch link. Signed-off-by:
Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
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Oleksij Rempel authored
Add SOM9331 based Board. It has 3 LAN ports, usb to uart controller and USB type A port. Signed-off-by:
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Oleksij Rempel authored
Add "openembed" entry for https://www.openembed.com/Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Geert Uytterhoeven authored
make dtbs_check: eth@1f010000: $nodename:0: 'eth@1f010000' does not match '^ethernet(@.*)?$' Signed-off-by:Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
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- 11 May, 2021 4 commits
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Bibo Mao authored
If multiple threads are accessing the same huge page at the same time, hugetlb_cow will be called if one thread write the COW huge page. And function huge_ptep_clear_flush is called to notify other threads to clear the huge pte tlb entry. The other threads clear the huge pte tlb entry and reload it from page table, the reload huge pte entry may be old. This patch fixes this issue on mips platform, and it clears huge pte entry before notifying other threads to flush current huge page entry, it is similar with other architectures. Signed-off-by:
Bibo Mao <maobibo@loongson.cn> Signed-off-by:
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Xiaochuan Mao authored
from Loongson-2K user manual know that Loongson-2K have two pcie controller pcie0 and pcie1, pcie0 have four port named port0~port3 and pcie1 have 2 port named port0~port1. the device id of port0 is 7a19 in each pcie controller and others are 7a09. Signed-off-by:
Xiaochuan Mao <maoxiaochuan@loongson.cn> Reviewed-by:
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Youling Tang authored
On the Loongson64 platform, if CONFIG_SMP is not set, the following build error will occur: arch/mips/loongson64/reset.c:133:2: error:'secondary_kexec_args' undeclared Because the definition and declaration of secondary_kexec_args are in the CONFIG_SMP, the secondary_kexec_args variable should be used in CONFIG_SMP. Reported-by:
Youling Tang <tangyouling@loongson.cn> Acked-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
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Mike Rapoport authored
CAVIUM_OCTEON_SOC configuration selects HOLES_IN_ZONE option to cope with memory crashes that were happening in 2011. This option effectively aliases pfn_valid_within() to pfn_valid() when enabled and hardwires it to 1 when disabled. The check for pfn_valid_within() is only relevant in case the memory map may have holes or undefined struct page instances inside MAX_ORDER chunks. Since 2011 memory management initialization in general and memory map initialization particularly became much more robust so the check for pfn_valid_within() is not required on Octeon even despite its, hmm, unusual memory setup. Remove the selection of HOLES_IN_ZONE by CAVIUM_OCTEON_SOC and drop the HOLES_IN_ZONE configuration option entirely as Octeon was the only MIPS platform to use it. Signed-off-by:
Mike Rapoport <rppt@linux.ibm.com> Signed-off-by:
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- 09 May, 2021 1 commit
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Linus Torvalds authored
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