- 05 Sep, 2022 33 commits
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Sean Anderson authored
This breaks out/combines get_affine_portal and the cgr sanity check in preparation for the next commit. No functional change intended. Signed-off-by:
Sean Anderson <sean.anderson@seco.com> Acked-by:
Camelia Groza <camelia.groza@nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Sean Anderson authored
There are several references to mac_dev in dpaa_netdev_init. Make things a bit more concise by adding a local variable for it. Signed-off-by:
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Sean Anderson authored
When disabling, there is nothing we can do about errors. In fact, the only error which can occur is misuse of the API. Just warn in the mac driver instead. Signed-off-by:
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Sean Anderson authored
This removes the _return label, since something like err = -EFOO; goto _return; can be replaced by the briefer return -EFOO; Additionally, this skips going to _return_of_node_put when dev_node has already been put (preventing a double put). Signed-off-by:
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Sean Anderson authored
Instead of using a void pointer for mac_dev, specify its type explicitly. Signed-off-by:
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Sean Anderson authored
Some params are already present in mac_dev. Use them directly instead of passing them through params. Signed-off-by:
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Sean Anderson authored
Instead of having the mac init functions call back into the fman core to get their params, just pass them directly to the init functions. Signed-off-by:
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Sean Anderson authored
We don't need to remap the base address from the resource twice (once in mac_probe() and again in set_fman_mac_params()). We still need the resource to get the end address, but we can use a single function call to get both at once. While we're at it, use platform_get_mem_or_io and devm_request_resource to map the resource. I think this is the more "correct" way to do things here, since we use the pdev resource, instead of creating a new one. It's still a bit tricky, since we need to ensure that the resource is a child of the fman region when it gets requested. Signed-off-by:
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Sean Anderson authored
This member was used to pass the phy node between mac_probe and the mac-specific initialization function. But now that the phy node is gotten in the initialization function, this parameter does not serve a purpose. Remove it, and do the grabbing of the node/grabbing of the phy in the same place. Signed-off-by:
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Sean Anderson authored
There are several small functions which were only necessary because the initialization functions didn't have access to the mac private data. Now that they do, just do things directly. Signed-off-by:
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Sean Anderson authored
These methods are no longer accessed outside of the driver file, so mark them as static. Signed-off-by:
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Sean Anderson authored
This moves mac-specific initialization to mac-specific files. This will make it easier to work with individual macs. It will also make it easier to refactor the initialization to simplify the control flow. No functional change intended. Signed-off-by:
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Heiner Kallweit authored
Let's trust the hardware here and remove this useless check. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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David S. Miller authored
Arun Ramadoss says: ==================== net: dsa: microchip: lan937x: enable interrupt for internal phy link detection This patch series enables the internal phy link detection for lan937x using the interrupt method. lan937x acts as the interrupt controller for the internal ports and phy, the irq_domain is registered for the individual ports and in turn for the individual port interrupts. RFC v3 -> Patch v1 - Removed the RFC v3 1/3 from the series - changing exit from reset - Changed the variable name in ksz_port from irq to pirq - Added the check for return value of irq_find_mapping during phy irq registeration. - Moved the clearing of POR_READY_INT from girq_thread_fn to lan937x_reset_switch RFC v2 -> v3 - Used the interrupt controller implementation of phy link Changes in RFC v2 - fixed the compilation issue ==================== Signed-off-by: -
Arun Ramadoss authored
This patch enables the interrupts for internal phy link detection for LAN937x. The interrupt enable bits are active low. There is global interrupt mask for each port. And each port has the individual interrupt mask for TAS. QCI, SGMII, PTP, PHY and ACL. The first level of interrupt domain is registered for global port interrupt and second level of interrupt domain for the individual port interrupts. The phy interrupt is enabled in the lan937x_mdio_register function. Interrupt from which port is raised will be detected based on the interrupt host data. Signed-off-by:
Arun Ramadoss <arun.ramadoss@microchip.com> Signed-off-by:
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Arun Ramadoss authored
In the lan937x_reset_switch(), it masks all the switch and port registers. In the Global_Int_status register, POR ready bit is write 1 to clear bit and all other bits are read only. So, this patch clear the por_ready_int status bit by writing 1. Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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Arun Ramadoss authored
struct ksz_port doesn't have reference to ksz_device as of now. In order to find out from which port interrupt has triggered, we need to pass the struct ksz_port as a host data. When the interrupt is triggered, we can get the port from which interrupt triggered, but to identify it is phy interrupt we have to read status register. The regmap structure for accessing the device register is present in the ksz_device struct. To access the ksz_device from the ksz_port, the reference is added to it with port number as well. Signed-off-by:
Andrew Lunn <andrew@lunn.ch> Reviewed-by:
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David S. Miller authored
Alex Elder says: ==================== net: ipa: start using transaction IDs A previous group of patches added ID fields to track the state of transactions: https://lore.kernel.org/netdev/20220831224017.377745-1-elder@linaro.org This series starts using those IDs instead of the lists used previously. Most of this series involves reworking the function that determines which transaction is the "last", which determines when a channel has been quiesed. The last patch is mainly used to prove that the new index method of tracking transaction state is equivalent to the previous use of lists. ==================== Signed-off-by:
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Alex Elder authored
The completed transaction list is used in gsi_channel_trans_complete() to return the next transaction in completed state. Add some temporary checks to verify the transaction indicated by the completed ID matches the one first in this list. Similarly, we use the pending and completed transaction lists when cancelling pending transactions in gsi_channel_trans_cancel_pending(). Add temporary checks there to verify the transactions indicated by IDs match those tracked by these lists. Signed-off-by:
Alex Elder <elder@linaro.org> Signed-off-by:
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Alex Elder authored
Do a little more refactoring in gsi_channel_trans_last() to simplify it further. The resulting code should behave exactly as before. Signed-off-by:
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Alex Elder authored
Using a little logic we can simplify gsi_channel_trans_last(). The first condition in that function looks like this: if (trans_info->allocated_id != trans_info->free_id) And if that's false, we proceed to the next one: if (trans_info->committed_id != trans_info->allocated_id) Failure of the first test implies: trans_info->allocated_id == trans_info->free_id And therefore, the second one can be rewritten this way: if (trans_info->committed_id != trans_info->free_id) Substituting free_id for allocated_id and committed_id can also be done in the code blocks executed when these conditions yield true. The net result is that all three blocks for TX endpoints can be consolidated into just one. The two blocks of code at the end of that function (used for both TX and RX channels) can be similarly consolidated into a single block. Signed-off-by: -
Alex Elder authored
Always use transaction IDs when finding the "last" transaction to await when quiescing a channel. This basically extends what was done in the previous patch to all other transaction state IDs. As a result we are no longer updating any transaction lists inside gsi_channel_trans_last(), so there's no need to take the spinlock. Signed-off-by:
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Alex Elder authored
Use the allocated and free transaction IDs to determine whether the "last" transaction used for quiescing a channel is in allocated state. The last allocated transaction that has not been committed (if any) immediately precedes the first free transaction in the transaction array. Signed-off-by:
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Alex Elder authored
When quiescing a channel, we find the "last" transaction, which is the latest one to have been allocated. (New transaction allocation will have been prevented by the time this is called.) Currently we do this by looking for the first non-empty transaction list in each state, then return the last entry from that last. Instead, determine the last entry in each list (if any) and return that entry if found. Temporarily (locally) introduce list_last_entry_or_null() as a helper for this, mirroring list_first_entry_or_null(). This macro definition will be removed by an upcoming patch. Remove the temporary warnings added by the previous commit. Signed-off-by:
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Heiner Kallweit authored
Now that we have devm_clk_get_optional_enabled(), we don't have to open-code it. Signed-off-by:
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Heiner Kallweit authored
It's not clear where these entries came from, and as I wrote in the comment: Not even Realtek's r8101 driver knows these chip id's. So remove the comment. Signed-off-by:
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Heiner Kallweit authored
It's not clear why XID's 380 and 381..387 ever got different chip version id's. VER_12 and VER_17 are handled exactly the same. Therefore merge handling under the VER_17 umbrella. Signed-off-by:
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David S. Miller authored
Maxime Chevallier says: ==================== net: altera: tse: phylink conversion This is V4 of a series converting the Altera TSE driver to phylink, introducing a new PCS driver along the way. The Altera TSE can be built with a SGMII/1000BaseX PCS, allowing to use SFP ports with this MAC, which is the end goal of adding phylink support and a proper PCS driver. The PCS itself can either be mapped in the MAC's register space, in that case, it's accessed through 32 bits registers, with the higher 16 bits always 0. Alternatively, it can sit on its own register space, exposing 16 bits registers, some of which ressemble the standard PHY registers. To tackle that rework, several things needs updating, starting by the DT binding, since we add support for a new register range for the PCS. Hence, the first patch of the series is a conversion to YAML of the existing binding. Then, patch 2 does a bit of simple cleanup to the TSE driver, using nice reverse xmas tree definitions. Patch 3 adds the actual PCS driver, as a standalone driver. Some future series will then reuse that PCS driver from the dwmac-socfpga driver, which implements support for this exact PCS too, allowing to share the code nicely. Patch 4 is then a phylink conversion of the altera_tse driver, to use this new PCS driver. Finally, patch 5 updates the newly converted DT binding to support the pcs register range. This series contains bits and pieces for this conversion, please tell me if you want me to send it as individual patches. V4 Changes: - Add missing MODULE_* macros to the TSE PCS driver V3 Changes: - YAML binding conversion changes and PCS addition changes thanks to Krzysztof's reviews V2 Changes : - Fixed the binding after the YAML conversion - Added a pcs_validate() callback - Introduced a comment to justify a soft reset for the PCS ==================== Signed-off-by: -
Maxime Chevallier authored
Some implementations of the TSE have their PCS as an external bloc, exposed at its own register range. Document this, and add a new example showing a case using the pcs and the new phylink conversion to connect an sfp port to a TSE mac. Signed-off-by:
Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by:
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Maxime Chevallier authored
Convert the Altera Triple Speed Ethernet Controller to phylink. This controller supports MII, GMII and RGMII with its MAC, and SGMII + 1000BaseX through a small embedded PCS. The PCS itself has a register set very similar to what is found in a typical 802.3 ethernet PHY, but this register set memory-mapped instead of lying on an mdio bus. Signed-off-by:
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Maxime Chevallier authored
The Altera Triple Speed Ethernet has a SGMII/1000BaseC PCS that can be integrated in several ways. It can either be part of the TSE MAC's address space, accessed through 32 bits accesses on the mapped mdio device 0, or through a dedicated 16 bits register set. This driver allows using the TSE PCS outside of altera TSE's driver, since it can be used standalone by other MACs. Signed-off-by:
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Maxime Chevallier authored
Make the driver code cleaner through a strictly cosmetic change, using he reverse xmas tree variable declaration ordering. Signed-off-by:
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Maxime Chevallier authored
Convert the bindings for the Altera Triple-Speed Ethernet to yaml. Signed-off-by:
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- 04 Sep, 2022 1 commit
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David S. Miller authored
Merge tag 'wireless-next-2022-09-03' of git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next Johannes Berg says: ==================== drivers - rtw89: large update across the map, e.g. coex, pci(e), etc. - ath9k: uninit memory read fix - ath10k: small peer map fix and a WCN3990 device fix - wfx: underflow stack - the "change MAC address while IFF_UP" change from James we discussed - more MLO work, including a set of fixes for the previous code, now that we have more code we can exercise it more - prevent some features with MLO that aren't ready yet (AP_VLAN and 4-address connections) ==================== Signed-off-by:
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- 03 Sep, 2022 6 commits
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Johannes Berg authored
In netlink RX, now that we can actually have multiple channel contexts for MLO, things don't work well as we only keep a single pointer, and then on link switching we might NULL it, and hit the return if the channel is NULL. However, we already use mac80211_hwsim_tx_iter() which deals with all this, so remove the test and adjust the remaining code a bit. This then means we no longer use the chanctx pointer, so remove it as well. Signed-off-by:Johannes Berg <johannes.berg@intel.com>
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Johannes Berg authored
Currently, other paths calling drv_sta_state() hold the mutex and therefore drivers can assume that, and look at links with that protection. Fix that for the reconfig path as well; to do it more easily use ieee80211_reconfig_stations() for the AP/AP_VLAN station reconfig as well. Signed-off-by: -
Johannes Berg authored
Add an MLD address attribute to BSS entries that the interface is currently associated with to help userspace figure out what's going on. Signed-off-by: -
Johannes Berg authored
Refactor the code to apply QoS settings to the driver so we can call it on link switch. Signed-off-by: -
Johannes Berg authored
Catch the bugs fixed in mac80211 by the previous commits and warn if an invalid address is added (or removed). Signed-off-by: -
Johannes Berg authored
When we stop a not-yet-started scan, we erroneously call into the driver, causing a sequence of sw_scan_start() followed by sw_scan_complete() twice. This will cause a warning in hwsim with next in line commit that validates the address passed to wmediumd/virtio. Fix this by doing the calls only if we were actually scanning. Signed-off-by:
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