1. 04 Apr, 2023 32 commits
  2. 21 Mar, 2023 5 commits
  3. 20 Mar, 2023 3 commits
    • German Gomez's avatar
      perf report: Add 'simd' sort field · ea15483e
      German Gomez authored
      Add 'simd' sort field to visualize SIMD ops in 'perf report'.
      
      Rows are labeled with the SIMD ISA, and the type of predicate (if any):
      
        - [p] partial predicate
        - [e] empty predicate (no elements in the vector being used)
      
      Example with Arm SPE and SVE (Scalable Vector Extension):
      
        #include <arm_sve.h>
      
        double src[1025], dst[1025];
      
        int main(void) {
          svfloat64_t vc = svdup_f64(1);
          for(;;)
            for(int i = 0; i < 1025; i += svcntd())
            {
              svbool_t pg = svwhilelt_b64(i, 1025);
              svfloat64_t vsrc = svld1(pg, &src[i]);
              svfloat64_t vdst = svadd_x(pg, vsrc, vc);
              svst1(pg, &dst[i], vdst);
            }
          return 0;
        }
      
        ... compiled using "gcc-11 -march=armv8-a+sve -O3"
      
      Profiling on a platform that implements FEAT_SVE and FEAT_SPEv1p1:
      
        $ perf record -e arm_spe_0// -- ./a.out
        $ perf report --itrace=i1i -s overhead,pid,simd,sym
      
        Overhead      Pid:Command   Simd     Symbol
        ........  ................  .......  ......................
      
          53.76%    10758:program            [.] main
          46.14%    10758:program   [.] SVE  [.] main
           0.09%    10758:program   [p] SVE  [.] main
      
      The report shows 0.09% of the sampled SVE operations use partial
      predicates due to src and dst arrays not being multiples of the vector
      register lengths.
      Signed-off-by: default avatarGerman Gomez <german.gomez@arm.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Anshuman.Khandual@arm.com
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20230320151509.1137462-2-james.clark@arm.comSigned-off-by: default avatarJames Clark <james.clark@arm.com>
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      ea15483e
    • German Gomez's avatar
      perf arm-spe: Add SVE flags to the SPE samples · 03a6c16e
      German Gomez authored
      Add flags from the Scalable Vector Extension (SVE) to the SPE samples
      which are available from Armv8.3 (FEAT_SPEv1p1).
      
      These will be displayed in a new SIMD sort field in a later commit.
      Signed-off-by: default avatarGerman Gomez <german.gomez@arm.com>
      Signed-off-by: default avatarJames Clark <james.clark@arm.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Link: https://lore.kernel.org/r/20230320151509.1137462-2-james.clark@arm.com
      Cc: Anshuman.Khandual@arm.com
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: Leo Yan <leo.yan@linaro.org>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-perf-users@vger.kernel.org
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      03a6c16e
    • German Gomez's avatar
      perf arm-spe: Refactor arm-spe to support operation packet type · 0066015a
      German Gomez authored
      Extend the decoder of Arm SPE records to support more fields from the
      operation packet type.
      
      Not all fields are being decoded by this commit. Only those needed to
      support the use-case SVE load/store/other operations.
      Suggested-by: default avatarLeo Yan <leo.yan@linaro.org>
      Signed-off-by: default avatarGerman Gomez <german.gomez@arm.com>
      Acked-by: default avatarIan Rogers <irogers@google.com>
      Cc: Adrian Hunter <adrian.hunter@intel.com>
      Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
      Cc: Anshuman.Khandual@arm.com
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jiri Olsa <jolsa@kernel.org>
      Cc: John Garry <john.g.garry@oracle.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Cc: Mike Leach <mike.leach@linaro.org>
      Cc: Namhyung Kim <namhyung@kernel.org>
      Cc: Peter Zijlstra <peterz@infradead.org>
      Cc: Will Deacon <will@kernel.org>
      Cc: linux-arm-kernel@lists.infradead.org
      Link: https://lore.kernel.org/r/20230320151509.1137462-2-james.clark@arm.comSigned-off-by: default avatarJames Clark <james.clark@arm.com>
      Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
      0066015a