- 22 Nov, 2021 4 commits
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Ramesh Errabolu authored
MMIO/DOORBELL BOs encode control data and should be pinned in GTT domain before enabling PCIe connected peer devices in accessing it Signed-off-by:
Ramesh Errabolu <Ramesh.Errabolu@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Ramesh Errabolu authored
Accounting system to track amount of available memory (system, TTM and VRAM of a device) relies on BO's domain. The change is to rely instead on allocation flag indicating BO type - VRAM, GTT, USERPTR, MMIO or DOORBELL Signed-off-by:
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Leo (Hanghong) Ma authored
[Why & How] Dmesg errors are found on dcn3.1 during reset test, but it's not a really failure. So reduce it to a debug print. Signed-off-by:
Leo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by:
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Leo (Hanghong) Ma authored
[Why & How] It doesn't make sense to guard DC_LOG_DP2 by CONFIG_DRM_AMD_DCN, and this also caused build failure for allmodconfig; So drop the guard to fix the compile failure; Reviewed-by:
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- 17 Nov, 2021 36 commits
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Perry Yuan authored
add support that allow the userspace tool like RGP to get the GFX clock value at runtime, the fix follow the old way to show the min/current/max clocks level for compatible consideration. === Test === $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz * 1: 1100Mhz 2: 1600Mhz then run stress test on one APU system. $ cat /sys/class/drm/card0/device/pp_dpm_sclk 0: 200Mhz 1: 1040Mhz * 2: 1600Mhz The current GFXCLK value is updated at runtime. BugLink: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5260Reviewed-by:
Huang Ray <Ray.Huang@amd.com> Signed-off-by:
Perry Yuan <Perry.Yuan@amd.com> Signed-off-by:
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Graham Sider authored
asic_family was a duplicate of asic_type, both of type amd_asic_type. Replace all instances of device_info->asic_family with adev->asic_type and remove asic_family from device_info. Signed-off-by:
Graham Sider <Graham.Sider@amd.com> Reviewed-by:
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Graham Sider authored
Switch to IP version checking instead of asic_type on various KFD version checks. Signed-off-by:
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Graham Sider authored
Converts KFD switch statements to use IP version checking instead of asic_type. Signed-off-by:
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Graham Sider authored
Defined as GC HWIP >= IP_VERSION(9, 0, 1). Also defines KFD_GC_VERSION to return GC HWIP version. Signed-off-by:
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Guchun Chen authored
Driver initialization is driven by IP version from IP discovery table. So add error print when failing to add ip block during driver initialization, this will be more friendly to user to know which IP version is not correct. [ 40.467361] [drm] host supports REQ_INIT_DATA handshake [ 40.474076] [drm] add ip block number 0 <nv_common> [ 40.474090] [drm] add ip block number 1 <gmc_v10_0> [ 40.474101] [drm] add ip block number 2 <psp> [ 40.474103] [drm] add ip block number 3 <navi10_ih> [ 40.474114] [drm] add ip block number 4 <smu> [ 40.474119] [drm] add ip block number 5 <amdgpu_vkms> [ 40.474134] [drm] add ip block number 6 <gfx_v10_0> [ 40.474143] [drm] add ip block number 7 <sdma_v5_2> [ 40.474147] amdgpu 0000:00:08.0: amdgpu: Fatal error during GPU init [ 40.474545] amdgpu 0000:00:08.0: amdgpu: amdgpu: finishing device. v2: use dev_err to multi-GPU system Signed-off-by:
Guchun Chen <guchun.chen@amd.com> Reviewed-by:
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Luben Tuikov authored
Also print the message index and parameter of the stuck command. Cc: Alex Deucher <Alexander.Deucher@amd.com> Signed-off-by:
Luben Tuikov <luben.tuikov@amd.com> Acked-by:
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ran jianping authored
Fix the following coccicheck review: ./drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c:1174:14-18 :Unneeded variable Remove unneeded variable used to store return value. Reported-by:
Zeal Robot <zealci@zte.com.cn> Signed-off-by:
ran jianping <ran.jianping@zte.com.cn> Signed-off-by:
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Xu Wang authored
Correct indentation in radeon_driver_load_kms. Signed-off-by:
Xu Wang <vulab@iscas.ac.cn> Signed-off-by:
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Graham Sider authored
These get funcs simply return an adev field. Replace funcs/calls with direct field accesses instead. Signed-off-by:
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Shirish S authored
update developers with next level of info about unsupported display configuration query that led to atomic check failure. Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
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Alvin Lee authored
[Why] In DC we want to wait for the INBOX0 HW Lock command to ACK before continuing. This is to ensure that the lock has been successfully acquired before programming HW in DC. [How] Add interfaces to send messages on INBOX0, poll for their completation and clear the ack. Reviewed-by:
Anson Jacob <Anson.Jacob@amd.com> Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by:
Alvin Lee <Alvin.Lee2@amd.com> Signed-off-by:
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Jimmy Kizito authored
[Why] Link encoder assignment tracking variables need to be (re)initialised whenever dc_state is (re)initialised. Otherwise variables used for dynamic encoder assignment (especially the link encoder availability pool) are out of sync with dc_state and future encoder assignments are invalid. [How] Initialise encoder assignment variables when creating new dc_state resource. Reviewed-by:
Jun Lei <Jun.Lei@amd.com> Acked-by:
Jimmy Kizito <Jimmy.Kizito@amd.com> Signed-off-by:
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Jimmy Kizito authored
[Why] Stream ordering and count can vary from one state to the next. Only checking a subset of entries in the encoder assignment table can lead to invalid encoder assignments. [How] Check all entries in encoder assignment table when querying it. Reviewed-by:
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Robin Chen authored
[Why] Some panels require to use TPS3 pattern to wake up link in PSR mode. [How] To add TPS3 selection information in PSR settings command and pass to DMUB FW. Reviewed-by:
Anthony Koo <Anthony.Koo@amd.com> Acked-by:
Robin Chen <po-tchen@amd.com> Signed-off-by:
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Aric Cyr authored
This version brings along following fixes: - Improvements to INBOX0 HW Lock - Add support for sending TPS3 pattern - Fix Coverity Issues - Fixes for DMUB - Fix RGB MPO underflow with multiple displays - WS fixes and code restructure Acked-by:
Aric Cyr <aric.cyr@amd.com> Signed-off-by:
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Charlene Liu authored
Reviewed-by:
Sung joon Kim <Sungjoon.Kim@amd.com> Acked-by:
Charlene Liu <Charlene.Liu@amd.com> Signed-off-by:
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Meenakshikumar Somasundaram authored
[Why] For dpia link, link->hpd_status indicates current state, but driver fails to capture hpd transitions in certain scenarios such as during link training. [How] Added link->hpd_pending flag that captures arrival of new hpd. Reviewed-by:
Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by:
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Chris Park authored
[Why] Coverity discovers holes in logic that needs to be addressed for improved code integrity. [How] Address issues found by coverity without changing the actual logic. Reviewed-by:
Chris Park <Chris.Park@amd.com> Signed-off-by:
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Sung Joon Kim authored
[why] At every reference to stream pointer, we need to increment/decrement the kref_count. Not doing so will result in invalid stream pointer still alive after hibernate cycle. [how] Call stream retain/release whenever the link encoder assignment is set to true/false since it indicates if we want to reference the stream pointer or not. Reviewed-by:
Sung Joon Kim <sungkim@amd.com> Signed-off-by:
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Roy Chan authored
[Why] The link encoder assignment leaves the old stream data when it was unassigned. When the clear encoder assignment is called, it based on the old stale data to access the de-allocated stream. [How] There should be no need to explicitly clean up the link encoder assignment if the unassign loop does the work properly, the loop should base on the current state to clean up the assignment. Also, the unassignment should better clean up the values in the assignement slots as well. Reviewed-by:
Roy Chan <roy.chan@amd.com> Signed-off-by:
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Huang, ChiaWen authored
[Why & How] According to eDP spec, DPCD 1.3 is only for eDP DPCD v1.4 In dpcd_set_link_settings function, the driver is just above v1.3 Reviewed-by:
Wenjing Liu <Wenjing.Liu@amd.com> Acked-by:
ChiawenHuang <chiawen.huang@amd.com> Signed-off-by:
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Charlene Liu authored
[why] reduce az indirect register dump. need add az clock_gating control field used in some project. [how] conditional output indrect register in the log. add clock_gating feild Reviewed-by:
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Dmytro Laktyushkin authored
Reviewed-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by:
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Nicholas Kazlauskas authored
[Why] A built firmware binary may be aligned to 16-bytes with padding at the end as necessary. In the case that padding was applied the meta info will not be detected correctly and we won't be able to allocate the appropriate firmware and tracebuffer sizes. [How] To maintain compatibility with already released firmware where this occurs we need to try every meta offset from 0..15 inclusive. Extract out the meta info checker into a helper function that's called for each of these offsets and exit early when we've found it. Reviewed-by:
Eric Yang <Eric.Yang2@amd.com> Acked-by:
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Jimmy Kizito authored
[Why] The link_enc_cfg API operates in one of two modes depending on the stage of application of dc_state to hardware. The API is the safest way to query link encoder assignments. [How] Use results of link encoder assignment query using link_enc_cfg API. Reviewed-by:
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Angus Wang authored
[WHY] With RGB MPO enabled, playing a video with multiple displays connected results in underflow when closing the video window [HOW] Reverted the old change to fix this problem, which prevented pipe splits for multiple display configurations and caused high MCLK speeds during idle. Added a two step call to dc_update_planes_and_stream, first time with pipe split disabled and the second time with pipe split enabled, which fixed the underflow issue Reviewed-by:
Angus Wang <angus.wang@amd.com> Signed-off-by:
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Charlene Liu authored
[why] matching the dmcub_support with all other dcn version. Reviewed-by:
Martin Leung <Martin.Leung@amd.com> Acked-by:
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Mikita Lipski authored
[why] PSR set power command wasn't setting panel instance and command version which caused both streams to overwrite the same PSR state. [how] Pass panel instance to the set power command function and to DMUB and set command version enum Reviewed-by:
Mikita Lipski <mikita.lipski@amd.com> Signed-off-by:
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Leo (Hanghong) Ma authored
[Why & How] 1. The code to blank all dp display have been called many times, so add helpers in dc_link to make it more concise. 2. Add some check to fix the dmesg errors at boot and resume from S3 on dcn3.1 during DQE's promotion test. Reviewed-by:
Wesley Chalmers <Wesley.Chalmers@amd.com> Reviewed-by:
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Ye Guojin authored
Since the variables named is_end_of_payload and hpd_status are already bool type, the ?: conditional operator is unnecessary any more. Clean them up here. Reported-by:
Simon Ser <contact@emersion.fr> Signed-off-by:
Ye Guojin <ye.guojin@zte.com.cn> Signed-off-by:
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Nirmoy Das authored
We set WC memtype for aper_base but don't check return value of arch_io_reserve_memtype_wc(). Be more defensive and return early on error. Signed-off-by:
Nirmoy Das <nirmoy.das@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Nirmoy Das authored
amdgpu_ttm_backend_bind() only needed for TTM_PL_TT and AMDGPU_PL_PREEMPT. Signed-off-by:
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Felix Kuehling authored
These bits are de-facto part of the uAPI, so declare them in a uAPI header. The corresponding bit-fields and enums in user mode are defined in https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/blob/master/include/hsakmttypes.h HSA_CAP_... -> HSA_CAPABILITY HSA_MEM_HEAP_TYPE_... -> HSA_HEAPTYPE HSA_MEM_FLAGS_... -> HSA_MEMORYPROPERTY HSA_CACHE_TYPE_... -> HsaCacheType HSA_IOLINK_TYPE_... -> HSA_IOLINKTYPE HSA_IOLINK_FLAGS_... -> HSA_LINKPROPERTY Signed-off-by:
Jonathan Kim <jonathan.kim@amd.com> Signed-off-by:
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Evan Quan authored
With the shadow buffer support from generic framebuffer emulation, it's possible now to have runpm kicked when no update for console. Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-by:
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Graham Sider authored
Completes removal of kgd_dev. Direct references to amdgpu_device objects should now be used instead. Signed-off-by:
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