- 03 Oct, 2012 40 commits
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Ben Skeggs authored
Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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Ben Skeggs authored
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Ben Skeggs authored
This is a HUGE commit, but it's not nearly as bad as it looks - any problems can be isolated to a particular chipset and engine combination. It was simply too difficult to port each one at a time, the compat layers are *already* ridiculous. Most of the changes here are simply to the glue, the process for each of the engine modules was to start with a standard skeleton and copy+paste the old code into the appropriate places, fixing up variable names etc as needed. v2: Marcin Slusarz <marcin.slusarz@gmail.com> - fix find/replace bug in license header v3: Ben Skeggs <bskeggs@redhat.com> - bump indirect pushbuf size to 8KiB, 4KiB barely enough for userspace and left no space for kernel's requirements during GEM pushbuf submission. - fix duplicate assignments noticed by clang v4: Marcin Slusarz <marcin.slusarz@gmail.com> - add sparse annotations to nv04_fifo_pause/nv04_fifo_start - use ioread32_native/iowrite32_native for fifo control registers v5: Ben Skeggs <bskeggs@redhat.com> - rebase on v3.6-rc4, modified to keep copy engine fix intact - nv10/fence: unmap fence bo before destroying - fixed fermi regression when using nvidia gr fuc - fixed typo in supported dma_mask checking Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
v2: Ben Skeggs <bskeggs@redhat.com> - de-inline nv_icmd, triggers some gcc issue causing ctxnv[ce]0.c to take a *very* *very* long time to build on some configs. Signed-off-by: -
Ben Skeggs authored
This is all very much a policy thing, and hence will not belong in SW after the rework. engsw now only handles receiving the event to say "can flip now" and makes a callback to perform the actual work. Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
There's a *lot* of code in here, and it's all going to use the PGRAPH priv pointer rather than drm_device after the engine rework. This is handling all the rename-only parts of the change. Signed-off-by: -
Ben Skeggs authored
Still the same code, but not an "engine" anymore. The fence code is more of a policy decision rather than exposing mechanisms, so it's not appropriate to port it to the new engine subsystem. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
v2 (Ben Skeggs): - some fixes for 64KiB PAGE_SIZE - fix porting issues in (currently unused) nv41/nv44 pciegart code Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Having GPUOBJ and VM intertwined like this makes it *really* hard to continue porting to the new driver architecture, split it out in favour of requiring explit maps be the caller. It's more flexible and obvious this way anyway... Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
The partial mapping thing is stupid and pointless... Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
These type of fake objects will not be supported for much longer. Signed-off-by: -
Ben Skeggs authored
A ton of duplication for the moment, will go away when they become subdevs. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
v2: - make sure not to execute display scripts unless resuming Signed-off-by: -
Ben Skeggs authored
Still missing the main bits we use to change performance levels, I'll get to it after all the hard yakka has been finished. Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
v2/v3: Ben Skeggs <bskeggs@redhat.com> - fix typo in default bus selection - fix accidental loss of destructor v4: Dmitry Eremin-Solenikov <dmitry_eremin@mentor.com> - fix typo causing incorrect default i2c port settings when no BMP data Signed-off-by: -
Ben Skeggs authored
v2: Ben Skeggs <bskeggs@redhat.com> - rebase on top of v3.6-rc6 with gpio reset patch integrated already Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
v2: Ben Skeggs <bskeggs@redhat.com> - use unaligned macros to access vbios image - endianness fixes Signed-off-by: -
Ben Skeggs authored
Adds an extra layer of indirection to each register access, but it's not too bad, and will also go away as pieces are ported. Signed-off-by: -
Ben Skeggs authored
These currently just call the existing ones in nouveau_drv.c, but will be extended in upcoming commits. This needed to be separated from the current code as there will be some header clashes until things are ported. Signed-off-by: -
Ben Skeggs authored
This commit provides most of the infrastructure to support a major overhaul of Nouveau's internals coming in the following commits. This work aims to take all the things we've learned over the last several years, and turn that into a cleaner architecture that's more maintainable going forward. RAMHT and MM bits of the new core have been left out for the moment, and will be pulled in as I go through the process of porting the code to become either subdev or engine modules. There are several main goals I wanted to achieve through this work: -- Reduce complexity The goal here was to make each component of the driver as independent as possible, which will ease maintainability and readability, and provide a good base for resetting locked up GPU units in the future. -- Better tracking of GPU units that are required at any given time This is for future PM work, we'll be able to tell exactly what parts of the GPU we need powered at any given point (etc). -- Expose all available NVIDIA GPUs to the client In order to support things such as multi-GPU channels, we want to be able to expose all the NVIDIA GPUs to the client over a single file descriptor so it can send a single push buffer to multiple GPUs. -- Untangle the core hardware support code from the DRM implementation This happened initially as an unexpected side-effect of developing the initial core infrastructure in userspace, but it turned into a goal of the whole project. Initial benefits will be the availablility of a number of userspace tools and tests using the same code as the driver itself, but will also be important as I look into some virtualisation ideas. v2: Ben Skeggs <bskeggs@redhat.com> - fix duplicate assignments noticed by clang - implement some forgotten yelling in error path - ensure 64-bit engine mask is used everywhere v3: Marcin Slusarz <marcin.slusarz@gmail.com> - sparse fixes - inline nv_printk into nv_assert to prevent recursive inlining issues v4: Ben Skeggs <bskeggs@redhat.com> - fixed minor memory leak on gpuobj destruction Signed-off-by: -
Ben Skeggs authored
Signed-off-by: -
Ben Skeggs authored
Future work will be headed in the way of separating the policy supplied by the nouveau drm module from the mechanisms provided by the driver core. There will be a couple of major classes (subdev, engine) of driver modules that have clearly defined tasks, and the further directory structure change is to reflect this. No code changes here whatsoever, aside from fixing up a couple of include file pathnames. Signed-off-by: -
Ben Skeggs authored
Won't necessarily be a drm_mm_node in the future, and I can't think of any good reason to not use the offset from the bo struct. There may have been some reason once apon a time, but, separate commit just in case. Signed-off-by: -
Ben Skeggs authored
Fixes some unfortunate races on resume. The G84 version of the code doesn't need this as "gpuobj"s are automagically suspended/resumed by the core code whereas pinned buffer objects are not. Cc: stable@vger.kernel.org Signed-off-by:
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