Merge tag 'tegra-for-6.6-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

arm64: tegra: Device tree changes for v6.6-rc1

The majority of this is fixes all over the place for DT schema
validation warnings. However, there are also cleanups for some things in
DT and audio support is added on IGX Orin. Jetson Orin NX and Nano also
gain a new thermal trip point to help keep the device cool at moderate
loads.

* tag 'tegra-for-6.6-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (22 commits)
  arm64: tegra: Add blank lines for better readability
  arm64: tegra: Remove {clock,reset}-names from VIC powergate
  arm64: tegra: Drop incorrect maxim,disable-etr on Smaug
  arm64: tegra: Add SPI device tree nodes for Tegra234
  arm64: tegra: Enable UARTA and UARTE for Orin Nano
  arm64: tegra: Add UARTE device tree node on Tegra234
  arm64: tegra: Adapt to LP855X bindings changes
  arm64: tegra: Add PCIe and DP 3.3V supplies
  arm64: tegra: Add missing reset-names for Tegra HS UART
  arm64: tegra: Remove current-speed for SBSA UART
  arm64: tegra: smaug: Remove reg-shift for high-speed UART
  arm64: tegra: Remove dmas and dma-names for debug UART
  arm64: tegra: Add 35°C trip point for Jetson Orin NX/Nano
  arm64: tegra: Remove duplicate PCI nodes
  arm64: tegra: Sort PCI nodes correctly on Orin
  arm64: tegra: Add audio support for IGX Orin
  arm64: tegra: Update CPU OPP tables
  arm64: tegra: Fix HSUART for Smaug
  arm64: tegra: Fix HSUART for Jetson AGX Orin
  arm64: tegra: Add missing alias for NVIDIA IGX Orin
  ...

Link: https://lore.kernel.org/r/20230728094129.3587109-4-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-6.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v6.6-rc1

This contains various fixes for DT schema validation and the Pegatron
Chagall and Nexus 7 get specific compatible strings for the panels that
they use.

* tag 'tegra-for-6.6-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Provide specific compatible string for Nexus 7 panel
  ARM: tegra: Use Hannstar HSD101PWW2 on Pegatron Chagall
  ARM: tegra: Reuse I2C3 for NVEC
  ARM: tegra: Add missing reset-names for Tegra HS UART
  ARM: tegra: Remove reset-names for UART devices
  ARM: tegra: Remove dmas and dma-names for debug UART

Link: https://lore.kernel.org/r/20230728094129.3587109-3-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'tegra-for-6.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

dt-bindings: Changes for v6.6-rc1

A number of Tegra-specific bindings are converted to json-schema and the
reserved-memory and BPMP bindings get support for Tegra264.

* tag 'tegra-for-6.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: firmware: Add support for tegra186-bpmp DRAM MRQ GSCs
  dt-bindings: reserved-memory: Add support for DRAM MRQ GSCs
  dt-bindings: thermal: tegra: Convert to json-schema
  dt-bindings: arm: tegra: nvec: Convert to json-schema
  dt-bindings: clock: tegra: Document Tegra132 compatible
  dt-bindings: cpu: Document NVIDIA Tegra186 CCPLEX cluster
  dt-bindings: serial: tegra-hsuart: Convert to json-schema
  dt-bindings: arm: tegra: ahb: Convert to json-schema
  dt-bindings: arm: tegra: flowctrl: Convert to json-schema

Link: https://lore.kernel.org/r/20230728094129.3587109-2-thierry.reding@gmail.comSigned-off-by: Arnd Bergmann <arnd@arndb.de>

panel-lvds alone is not a valid compatible string and we always need a
specific compatible string as well. Nexus 7 can come with one of (at
least) two panels, so pick one of them as the specific compatible
string.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The LVDS bindings require a specific compatible string in addition to
the generic "panel-lvds". Add the HannStar HSD101PWW2 which is used on
a similar device (ASUS TF201) and seems to work fine with slightly
modified timings in DT.
Suggested-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Instead of duplicating the I2C3 node and adding NVEC specific
properties, reuse the I2C3 node, extend it with NVEC specific properties
and drop properties that are not needed by NVEC. This results in a DTB
that is a bit cleaner and avoids accidentally using I2C3 and NVEC which
would have them fight over the same hardware resources.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add a few blank lines to visually separate blocks in the Jetson AGX Orin
device tree.
Signed-off-by: Thierry Reding <treding@nvidia.com>

According to the device tree bindings, the powergate definition nodes
don't contain clock-names and reset-names properties, so remove them.
Signed-off-by: Thierry Reding <treding@nvidia.com>

There is no "maxim,disable-etr" property (but there is
maxim,enable-etr), neither in the bindings nor in the Linux driver:

  tegra210-smaug.dtb: regulator@1c: Unevaluated properties are not allowed ('maxim,disable-etr' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Create the device tree nodes for the SPI1, SPI2 and SPI3 controllers
found on Tegra234.
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Activate UARTA and UARTE functionalities for Orin Nano.

- UARTA is accessible via the 40-pin header with pin 8 and 10 (TX/RX)
- UARTE utilizes the M2.E connector
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

This commit adds the device tree node for UARTE on Tegra234.
Signed-off-by: Gautham Srinivasan <gauthams@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Change underscores in ROM node names to dashes, and remove deprecated
pwm-period property.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add the 3.3V supplies for PCIe C1 controller and Display Port controller
for the NVIDIA IGX Orin platform.
Signed-off-by: Shubhi Garg <shgarg@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The device tree bindings for the Tegra high-speed UART require the
reset-names property, so add it whenever the compatible string for the
serial port is overwritten.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The SBSA UART device tree bindings don't define a current-speed
property, so remove it.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The device tree bindings for the high-speed UART don't define a
reg-shift property, so delete it.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The debug UART doesn't support DMA and the DT bindings prohibit the use
of the dmas and dma-names properties for it, so remove them.
Signed-off-by: Thierry Reding <treding@nvidia.com>

It turns out that these devices can get quite hot to the touch with the
standard cooling configuration, so add another trip point at 35°C along
with a cooling map to help keep the system reasonably cool at very low
system load.
Reviewed-by: Yi-Wei Wang <yiweiw@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The PCI nodes for Jetson Orin NX are already defined at the carrier
board level, so the duplicates can be dropped at the platform level.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Recent changes to several Orin boards didn't order some device tree
nodes correctly. Resort them.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add audio support for the NVIDIA IGX Orin development kit having P3701
module with P3740 carrier board.

Move the common device-tree nodes to a new file tegra234-p3701.dtsi and
use this for Jetson AGX Orin and NVIDIA IGX Orin platforms
Signed-off-by: Mohan Kumar <mkumard@nvidia.com>
[treding@nvidia.com: properly sort nodes]
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add memory-region property to the tegra186-bpmp binding to support
DRAM MRQ GSCs.
Co-developed-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add bindings for DRAM MRQ GSC support.
Co-developed-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Stefan Kristiansson <stefank@nvidia.com>
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Convert the Tegra thermal bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Convert the NVIDIA embedded controller bindings from the free-form text
format to json-schema.
Acked-by: Marc Dietrich <marvin24@gmx.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Tegra132 clock and reset controller is largely compatible with the
version found on Tegra124 but it does have slight differences in what
clocks it exposes, so a separate compatible string is needed.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add device tree bindings for the CCPLEX cluster found on NVIDIA Tegra186
SoCs.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The device tree bindings for the Tegra high-speed UART require the
reset-names property, so add it whenever the compatible string for the
serial port is overwritten.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The UART devices found on Tegra chips have a single reset connected to
them, so a reset-names property isn't needed. In fact, the device tree
bindings don't allow this property, so remove them to allow the nodes
to be properly validated.
Signed-off-by: Thierry Reding <treding@nvidia.com>

The debug UART doesn't support DMA and the DT bindings prohibit the use
of the dmas and dma-names properties for it, so remove them.
Signed-off-by: Thierry Reding <treding@nvidia.com>

Convert the Tegra High-Speed UART bindings from the free-form text
format to json-schema.

While at it, also fix fix the example to reflect the correct compatible
string for Tegra30 chips.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Convert the NVIDIA Tegra AHB bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Convert the Tegra flow controller bindings from the free-form text
format to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Pull xtensa fixes from Max Filippov:

 - fix interaction between unaligned exception handler and load/store
   exception handler

 - fix parsing ISS network interface specification string

 - add comment about etherdev freeing to ISS network driver

* tag 'xtensa-20230716' of https://github.com/jcmvbkbc/linux-xtensa:
  xtensa: fix unaligned and load/store configuration interaction
  xtensa: ISS: fix call to split_if_spec
  xtensa: ISS: add comment about etherdev freeing

Pull perf fix from Borislav Petkov:

 - Fix a lockdep warning when the event given is the first one, no event
   group exists yet but the code still goes and iterates over event
   siblings

* tag 'perf_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf/x86: Fix lockdep warning in for_each_sibling_event() on SPR

Pull objtool fixes from Borislav Petkov:

 - Mark copy_iovec_from_user() __noclone in order to prevent gcc from
   doing an inter-procedural optimization and confuse objtool

 - Initialize struct elf fully to avoid build failures

* tag 'objtool_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  iov_iter: Mark copy_iovec_from_user() noclone
  objtool: initialize all of struct elf

Pull scheduler fixes from Borislav Petkov:

 - Remove a cgroup from under a polling process properly

 - Fix the idle sibling selection

* tag 'sched_urgent_for_v6.5_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched/psi: use kernfs polling functions for PSI trigger polling
  sched/fair: Use recent_used_cpu to test p->cpus_ptr

Pull pin control fixes from Linus Walleij:
 "I'm mostly on vacation but what would vacation be without a few
  critical fixes so people can use their gaming laptops when hiding away
  from the sun (or rain)?

   - Fix a really annoying interrupt storm in the AMD driver affecting
     Asus TUF gaming notebooks

   - Fix device tree parsing in the Renesas driver"

* tag 'pinctrl-v6.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: amd: Unify debounce handling into amd_pinconf_set()
  pinctrl: amd: Drop pull up select configuration
  pinctrl: amd: Use amd_pinconf_set() for all config options
  pinctrl: amd: Only use special debounce behavior for GPIO 0
  pinctrl: renesas: rzg2l: Handle non-unique subnode names
  pinctrl: renesas: rzv2m: Handle non-unique subnode names