1. 21 Mar, 2019 2 commits
    • Adam Thomson's avatar
      ASoC: da7219: Expose BCLK and WCLK control through CCF · d90ba6c8
      Adam Thomson authored
      For the purposes of platforms which use the codec as DAI clock
      master for the CPU and other codec devices, there is the need to
      not only expose the clock gating of BCLK and WCLK but also the
      ability to set those rates without going through the ASoC APIs.
      
      To make this possible, the previous CCF implementation in the
      driver has been extended to separate BCLK and WCLK out. WCLK is
      the parent clock to BCLK, and is also the clock gate for both.
      BCLK in HW is a factor/multiplier of WCLK so derives from whatever
      SR is chosen for WCLK, hence the need to make it a child of WCLK
      for the purposes of CCF. Enabling/disabling either BCLK or WCLK
      will result in clocks being ungated/gated accordingly. To simplify
      matters, these clocks can only be configured if the codec is set
      as master, otherwise CCF control is disallowed.
      Signed-off-by: default avatarAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      d90ba6c8
    • Adam Thomson's avatar
      ASoC: da7219: Update DAI clock binding info to cover WCLK/BCLK · 41d176d3
      Adam Thomson authored
      With the need to expose WCLK and BCLK as separate clocks, the
      'clock-cells' and 'clock-output-names' descriptions need to be
      updated as now the codec is providing 2 clocks. The example is
      also updated accordingly.
      Signed-off-by: default avatarAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
      Signed-off-by: default avatarMark Brown <broonie@kernel.org>
      41d176d3
  2. 20 Mar, 2019 5 commits
  3. 19 Mar, 2019 17 commits
  4. 18 Mar, 2019 16 commits