- 05 Jul, 2018 40 commits
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Dirk Hohndel (VMware) authored
This is dual licensed under GPL-2.0 or MIT. Acked-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Dirk Hohndel (VMware) <dirk@hohndel.org> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Dirk Hohndel (VMware) authored
This is dual licensed under GPL-2.0 or MIT. Acked-by:
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Thomas Zimmermann authored
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by:
Thomas Zimmermann <contact@tzimmermann.org> Signed-off-by:
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Alex Deucher authored
Set the me instance in early init and use that rather than calculating the instance based on the ring pointer. Reviewed-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
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Alex Deucher authored
Set the me instance in early init and use that rather than calculating the instance based on the ring pointer. Reviewed-by:
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Alex Deucher authored
Should be using PCIELaneLow for the low clock level. Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Alex Deucher authored
Should be mclk rather than sclk. Reviewed-by:
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Alex Deucher authored
Need to swap before doing arthimetic on the values. Reviewed-by:
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Alex Deucher authored
Values need to be swapped on big endian. Reviewed-by:
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Alex Deucher authored
new_active_crtcs is a bitmask, new_active_crtc_count is the actual count. Reviewed-by:
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Alex Deucher authored
The phys and vm versions had the values swapped. Reviewed-by:
Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by:
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Michel Dänzer authored
The parameter was removed. Fixes: a19741e5 "dma_buf: remove device parameter from attach callback v2" Reviewed-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Michel Dänzer authored
To hopefully make the code dealing with GPU vs CPU pages a little clearer. Suggested-by:
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Michel Dänzer authored
Signed-off-by:
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Lyude Paul authored
The other day I was testing one of the HP laptops at my office with an i915/amdgpu hybrid setup and noticed that hotplugging was non-functional on almost all of the display outputs. I eventually discovered that all of the external outputs were connected to the amdgpu device instead of i915, and that the hotplugs weren't being detected so long as the GPU was in runtime suspend. After some talking with folks at AMD, I learned that amdgpu is actually supposed to support hotplug detection in runtime suspend so long as the OEM has implemented it properly in the firmware. On this HP ZBook 15 G4 (the machine in question), amdgpu wasn't managing to find the ATIF handle at all despite the fact that I could see acpi events being sent in response to any hotplugging. After going through dumps of the firmware, I discovered that this machine did in fact support ATIF, but that it's ATIF method lived in an entirely different namespace than this device's handle (the device handle was \_SB_.PCI0.PEG0.PEGP, but ATIF lives in ATPX's handle at \_SB_.PCI0.GFX0). So, fix this by probing ATPX's ACPI parent's namespace if we can't find ATIF elsewhere, along with storing a pointer to the proper handle to use for ATIF and using that instead of the device's handle. This fixes HPD detection while in runtime suspend for this ZBook! v2: Update the comment to reflect how the namespaces are arranged based on the system configuration. (Alex) Signed-off-by:
Lyude Paul <lyude@redhat.com> Signed-off-by:
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Lyude Paul authored
Since it seems that some vendors are storing the ATIF ACPI methods under the same handle that ATPX lives under instead of the device's own handle, we're going to need to be able to retrieve this handle later so we can probe for ATIF there. Signed-off-by:
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Lyude Paul authored
Fix typo. Reviewed-by:
Jim Qu <Jim.Qu@amd.com> Signed-off-by:
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Lyude Paul authored
Currently, there is nothing in amdgpu that actually uses these structs other than amdgpu_acpi.c. Additionally, since we're about to start saving the correct ACPI handle to use for calling ATIF in this struct this saves us from having to handle making sure that the acpi_handle (and by proxy, the type definition for acpi_handle and all of the other acpi headers) doesn't need to be included within the amdgpu_drv struct itself. This follows the example set by amdgpu_atpx_handler.c. Signed-off-by:
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Evan Quan authored
Fix coding style and drop unused variable. Signed-off-by:
Evan Quan <evan.quan@amd.com> Acked-by:
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Evan Quan authored
Thermal support is enabled on vega12. Signed-off-by:
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Evan Quan authored
Set num_displays to 0 and force uclk high as part of the mode set sequence. Signed-off-by:
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Evan Quan authored
This add the apply_clocks_adjust_rules callback which is used to validate the clock settings on a power state change. Signed-off-by:
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Evan Quan authored
Use MAX_NUM_CLOCKS instead of VG12_PSUEDO* macros for the max number of dpm levels. Signed-off-by:
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Evan Quan authored
We don't need to set uclk hard min here because this will be set with other clocks on power state change. Signed-off-by:
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Evan Quan authored
Need to take into account multi-head with synced displays. Signed-off-by:
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Evan Quan authored
On UVD/VCE dpm enabled/disabled, the powergate status will be set as false/true. So that we will not try to ungate/gate them( enable/disable their dpm) again. v2: added check for uvd/vce powergate status before gating v3: fix typo in description v4: warning fix (Alex) Signed-off-by:
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Evan Quan authored
Make sure the clock level set only on dpm enabled. Also uvd/vce/soc clock also changed correspondingly. Signed-off-by:
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Evan Quan authored
So that we do not need to use PPSMC_MSG_GetMin/MaxDpmFreq to get the clock ranges on runtime. Since that causes some problems. Signed-off-by:
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Evan Quan authored
Initialize the soft/hard min/max level correctly and handle the dpm disabled situation. Signed-off-by:
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Evan Quan authored
This workaround is not needed any more. Signed-off-by:
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Evan Quan authored
A new member Vr2_I2C_address is added. Signed-off-by:
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Evan Quan authored
The vbios firmware structure changed between v3_1 and v3_2. So, the code to setup bootup values needs different paths based on header version. Signed-off-by:
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Rex Zhu authored
change wm_min_memg_clk_in_khz -> wm_min_mem_clk_in_khz Reviewed-by:
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rex zhu authored
use ppfeaturemask to enable/disable stutter mode. Reviewed-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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rex zhu authored
Enable stutter mode can save power in low DRAM use cases including but not limited to productivity application use, web browsing, and video playback. Currently this feature is disabled by default. Make bit 17 in module parameter amdgpu_pp_feature_mask as stutter mode mask, so user can enable/disable this feature easily. Reviewed-by:
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Rex Zhu authored
Partially revert commit 2dc80b00 ("drm/amdgpu: optimize amdgpu driver load & resume time")' 1. CG/PG enablement are part of gpu hw ip initialize, we should wait for them complete. otherwise, there are some potential conflicts, for example, Suspend and CG enablement concurrently. 2. better run ib test after hw initialize completely. That is to say, ib test should be after CG/PG enablement. otherwise, the test will not cover the cg/pg/poweroff enable case. Reviewed-by:
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Rex Zhu authored
1. add amdgpu_device_ip_late_set_pg_state function for set pg state. 2. delete duplicate pg state setting on gfx_v8_0's late_init. Reviewed-by:
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Rex Zhu authored
we can take gfx off feature as gfx power gate. gfx off feature is also controled by smu. so add gfx_off support in pp_set_powergating_by_smu. Reviewed-by:
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Rex Zhu authored
Raven support gfx off feature instand of gfx powergate, so use smu10_gfx_off_control as the powergate_gfx backend function. Reviewed-by:
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Rex Zhu authored
gfx ip block can call set_powergating_by_smu to set gfx pg state if necessary. Reviewed-by:
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