1. 14 Mar, 2018 9 commits
    • Mahesh Kumar's avatar
      drm/i915/cnl: Kill _MMIO_PORT6 macro · da9cb11f
      Mahesh Kumar authored
      This patch replaces use of remaining _MMIO_PORT6 macro and removes the
      macro.
      
      Changes Since V1:
       - Rebase
      Signed-off-by: default avatarMahesh Kumar <mahesh1.kumar@intel.com>
      Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180314080653.9444-3-mahesh1.kumar@intel.com
      da9cb11f
    • Mahesh Kumar's avatar
      drm/i915/cnl; Add macro to get PORT_TX register · 4635b573
      Mahesh Kumar authored
      This patch creates a new macro to get PORT_TX register for any given DW.
      This removes the need of defining register address for each port & DW.
      
      Changes since V1:
       - Use underscope prefix, as macro isn't returning an mmio reg(Lucas)
       - Merge patch 1 & 2 of the series
      Changes since V2:
       - remove _MMIO_PORT6_LN macro (Rodrigo)
      Signed-off-by: default avatarMahesh Kumar <mahesh1.kumar@intel.com>
      Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180314080653.9444-2-mahesh1.kumar@intel.com
      4635b573
    • Tvrtko Ursulin's avatar
      drm/i915/pmu: Work around compiler warnings on some kernel configs · ad055fb8
      Tvrtko Ursulin authored
      Arnd Bergman reports:
      """
      The conditional spinlock confuses gcc into thinking the 'flags' value
      might contain uninitialized data:
      
      drivers/gpu/drm/i915/i915_pmu.c: In function '__i915_pmu_event_read':
      arch/x86/include/asm/paravirt_types.h:573:3: error: 'flags' may be used uninitialized in this function [-Werror=maybe-uninitialized]
      
      The code is correct, but it's easy to see how the compiler gets confused
      here. This avoids the problem by pulling the lock outside of the function
      into its only caller.
      """
      
      On deeper look it seems this is caused by paravirt spinlocks
      implementation when CONFIG_PARAVIRT_DEBUG is set, which by being
      complicated, manages to convince gcc locked parameter can be changed
      externally (impossible).
      
      Work around it by removing the conditional locking parameters altogether.
      (It was never the most elegant code anyway.)
      
      Slight penalty we now pay is an additional irqsave spin lock/unlock cycle
      on the event enable path. But since enable is not a fast path, that is
      preferrable to the alternative solution which was doing MMIO under irqsave
      spinlock.
      Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
      Reported-by: default avatarArnd Bergmann <arnd@arndb.de>
      Fixes: 1fe699e3 ("drm/i915/pmu: Fix sleep under atomic in RC6 readout")
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Imre Deak <imre.deak@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
      Cc: David Airlie <airlied@linux.ie>
      Cc: intel-gfx@lists.freedesktop.org
      Cc: dri-devel@lists.freedesktop.org
      Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180314080535.17490-1-tvrtko.ursulin@linux.intel.com
      ad055fb8
    • Chris Wilson's avatar
      drm/i915: Check rq->timeline before deference · ab268151
      Chris Wilson authored
      Not only is the context suspect to disappearing, but so is it's
      timeline. Under a lockless inspection of the requests for
      debugging from intel_engine_dump(), the context may already have been
      freed and we have to check before chasing the dangling pointer.
      
      [28033.681755] Modules linked in: vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic x86_pkg_temp_thermal intel_powerclamp coretemp snd_hda_intel crct10dif_pclmul crc32_pclmul snd_hda_codec snd_hwdep snd_hda_core ghash_clmulni_intel snd_pcm mei_me mei i915 r8169 mii prime_numbers i2c_hid
      [28033.681796] CPU: 3 PID: 3058 Comm: gem_exec_schedu Tainted: G     U           4.16.0-rc5+ #9
      [28033.681804] Hardware name: Acer Aspire E5-575G/Ironman_SK  , BIOS V1.12 08/02/2016
      [28033.681834] RIP: 0010:print_request+0x2b/0xb0 [i915]
      [28033.681840] RSP: 0018:ffffc90004afbc18 EFLAGS: 00010202
      [28033.681847] RAX: 6b6b6b6b6b6b6b6b RBX: ffff8801921b5a40 RCX: 0000000000000006
      [28033.681854] RDX: ffffc90004afbc60 RSI: ffff8801921b5a40 RDI: 0000000000000004
      [28033.681861] RBP: ffffc90004afbd80 R08: 0000000000000000 R09: 0000000000000001
      [28033.681868] R10: ffffc90004afbbd0 R11: ffffc90004afbc73 R12: ffffc90004afbc60
      [28033.681875] R13: ffffc90004afbd80 R14: ffff8801d40ec670 R15: ffff8801921b5a40
      [28033.681883] FS:  00007fbba5f6c8c0(0000) GS:ffff8801e8400000(0000) knlGS:0000000000000000
      [28033.681891] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [28033.681897] CR2: 00007fbba5f8f000 CR3: 00000001b2efa002 CR4: 00000000003606e0
      [28033.681904] Call Trace:
      [28033.681932]  intel_engine_print_registers+0x6a7/0x930 [i915]
      [28033.681962]  intel_engine_dump+0x30d/0x740 [i915]
      [28033.681971]  ? seq_printf+0x3a/0x50
      [28033.681995]  i915_engine_info+0xb8/0xe0 [i915]
      [28033.682003]  ? drm_get_color_range_name+0x20/0x20
      [28033.682010]  seq_read+0xe1/0x440
      [28033.682018]  full_proxy_read+0x51/0x80
      [28033.682025]  __vfs_read+0x21/0x130
      [28033.682031]  ? do_sys_open+0x134/0x220
      [28033.682037]  ? kmem_cache_free+0x177/0x2b0
      [28033.682043]  vfs_read+0xa1/0x150
      [28033.682049]  SyS_read+0x40/0xa0
      [28033.682055]  do_syscall_64+0x6b/0x1b0
      [28033.682063]  entry_SYSCALL_64_after_hwframe+0x42/0xb7
      [28033.682069] RIP: 0033:0x7fbba4655d11
      [28033.682074] RSP: 002b:00007ffd8c49da58 EFLAGS: 00000246 ORIG_RAX: 0000000000000000
      [28033.682082] RAX: ffffffffffffffda RBX: 0000000000000000 RCX: 00007fbba4655d11
      [28033.682089] RDX: 000000000000003f RSI: 00005647bfbfc260 RDI: 0000000000000006
      [28033.682096] RBP: 000000000000003f R08: 00000000ffffffff R09: 0000000000000000
      [28033.682104] R10: 0000000000000000 R11: 0000000000000246 R12: 00005647bfbfc260
      [28033.682111] R13: 0000000000000006 R14: 0000000000000000 R15: 00005647bfbfc260
      [28033.682119] Code: 41 55 41 54 49 89 d4 55 53 48 89 fd 48 8b 86 c8 00 00 00 48 8b 3d d6 1e 14 e2 48 89 f3 48 2b be a8 02 00 00 48 8b 80 b0 00 00 00 <4c> 8b 68 18 e8 bc 80 02 e1 8b 8b 70 02 00 00 8b b3 28 02 00 00
      [28033.682206] RIP: print_request+0x2b/0xb0 [i915] RSP: ffffc90004afbc18
      Reported-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180314101630.8933-1-chris@chris-wilson.co.uk
      ab268151
    • Jackie Li's avatar
      drm/i915/guc: Check the locking status of GuC WOPCM registers · f08e2035
      Jackie Li authored
      GuC WOPCM registers are write-once registers. Current driver code accesses
      these registers without checking the accessibility to these registers which
      will lead to unpredictable driver behaviors if these registers were touch
      by other components (such as faulty BIOS code).
      
      This patch moves the GuC WOPCM registers updating code into intel_wopcm.c
      and adds check before and after the update to GuC WOPCM registers so that
      we can make sure the driver is in a known state after writing to these
      write-once registers.
      
      v6:
       - Made sure module reloading won't bug the kernel while doing
         locking status checking
      
      v7:
       - Fixed patch format issues
      
      v8:
       - Fixed coding style issue on register lock bit macro definition (Sagar)
      
      v9:
       - Avoided to use redundant !! to cast uint to bool (Chris)
       - Return error code instead of GEM_BUG_ON for locked with invalid register
         values case (Sagar)
       - Updated guc_wopcm_hw_init to use guc_wopcm as first parameter (Michal)
       - Added code to set and validate the HuC_LOADING_AGENT_GUC bit in GuC
         WOPCM offset register based on the presence of HuC firmware (Michal)
       - Use bit fields instead of macros for GuC WOPCM flags (Michal)
      
      v10:
       - Refined variable names, removed redundant comments (Joonas)
       - Introduced lockable_reg to handle the write once register write and
         propagate the write error to caller (Joonas)
       - Used lockable_reg abstraction to avoid locking bit check on generic
         i915_reg_t (Michal)
       - Added log message for error paths (Michal)
       - Removed hw_updated flag and only relies on real hardware status
      
      v11:
       - Replaced lockable_reg with simplified function (Michal)
       - Used new macros for locking bits of WOPCM size/offset registers instead
         of using BIT(0) directly (Michal)
       - use intel_wopcm_init_hw() called from intel_gem_init_hw() to do GuC
         WOPCM register setup instead of calling from intel_uc_init_hw() (Michal)
      
      v12:
       - Updated function kernel-doc to align with code changes (Michal)
       - Updated code to use wopcm pointer directly (Michal)
      
      v13:
       - Updated the ordering of s-o-b/cc/r-b tags (Sagar)
      
      BSpec: 10875, 10833
      Signed-off-by: default avatarJackie Li <yaodong.li@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12)
      Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-5-git-send-email-yaodong.li@intel.com
      f08e2035
    • Jackie Li's avatar
      drm/i915: Add HuC firmware size related restriction for Gen9 and CNL A0 · 96c83d35
      Jackie Li authored
      On CNL A0 and Gen9, there's a hardware restriction that requires the
      available GuC WOPCM size to be larger than or equal to HuC firmware size.
      
      This patch adds new verification code to ensure the available GuC WOPCM
      size to be larger than or equal to HuC firmware size on both Gen9 and CNL
      A0.
      
      v6:
       - Extended HuC FW size check against GuC WOPCM size to all
         Gen9 and CNL A0 platforms
      
      v7:
       - Fixed patch format issues
      
      v8:
       - Renamed variables and functions to avoid ambiguity (Joonas)
       - Updated commit message and comments to be more comprehensive (Sagar)
      
      v9:
       - Moved code that is not related to restriction check into a separate
         patch and updated the commit message accordingly (Sagar/Michal)
       - Avoided to call uc_get_fw_size for better layer isolation (Michal)
      
      v10:
       - Shorten function names and reorganized size_check code to have clear
         isolation (Joonas)
       - Removed unnecessary comments (Joonas)
      
      v11:
       - Fixed logic error in size check (Michal)
      
      v12:
       - Add space between "HuC FW" and "(%uKiB)" in error message (Michal)
      
      v13:
       - Updated the ordering of s-o-b/cc/r-b tags (Sagar)
      
      BSpec: 10875
      Signed-off-by: default avatarJackie Li <yaodong.li@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
      Cc: John Spotswood <john.a.spotswood@intel.com>
      Cc: Jeff McGee <jeff.mcgee@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v8)
      Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12)
      Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-4-git-send-email-yaodong.li@intel.com
      96c83d35
    • Jackie Li's avatar
      drm/i915: Add support to return CNL specific reserved WOPCM size · 5cbc1e2f
      Jackie Li authored
      CNL has its specific reserved GuC WOPCM size for RC6 and other hardware
      contexts.
      
      This patch updates the code to return CNL specific reserved GuC WOPCM size
      for RC6 and other hardware contexts so that the GuC WOPCM size can be
      calculated correctly for CNL.
      
      v9:
       - Created a new patch for these changes originally made in v8 4/6 patch of
         this series (Sagar/Michal)
      
      v10:
       - Used if-else ladder to the returning of context sizes (Joonas)
      
      v11:
       - Removed GUC_ prefix from context size macro (Michal)
      
      v13:
        - Updated the ordering of s-o-b/cc/r-b tags (Sagar)
      
      Bspec: 12690
      Signed-off-by: default avatarJackie Li <yaodong.li@intel.com>
      Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v9)
      Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12)
      Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-3-git-send-email-yaodong.li@intel.com
      5cbc1e2f
    • Jackie Li's avatar
      drm/i915: Implement dynamic GuC WOPCM offset and size calculation · 6b0478fb
      Jackie Li authored
      Hardware may have specific restrictions on GuC WOPCM offset and size. On
      Gen9, the value of the GuC WOPCM size register needs to be larger than the
      value of GuC WOPCM offset register + a Gen9 specific offset (144KB) for
      reserved GuC WOPCM. Fail to enforce such a restriction on GuC WOPCM size
      will lead to GuC firmware execution failures. On the other hand, with
      current static GuC WOPCM offset and size values (512KB for both offset and
      size), the GuC WOPCM size verification will fail on Gen9 even if it can be
      fixed by lowering the GuC WOPCM offset by calculating its value based on
      HuC firmware size (which is likely less than 200KB on Gen9), so that we can
      have a GuC WOPCM size value which is large enough to pass the GuC WOPCM
      size check.
      
      This patch updates the reserved GuC WOPCM size for RC6 context on Gen9 to
      24KB to strictly align with the Gen9 GuC WOPCM layout. It also adds support
      to verify the GuC WOPCM size aganist the Gen9 hardware restrictions. To
      meet all above requirements, let's provide dynamic partitioning of the
      WOPCM that will be based on platform specific HuC/GuC firmware sizes.
      
      v2:
       - Removed intel_wopcm_init (Ville/Sagar/Joonas)
       - Renamed and Moved the intel_wopcm_partition into intel_guc (Sagar)
       - Removed unnecessary function calls (Joonas)
       - Init GuC WOPCM partition as soon as firmware fetching is completed
      
      v3:
       - Fixed indentation issues (Chris)
       - Removed layering violation code (Chris/Michal)
       - Created separat files for GuC wopcm code  (Michal)
       - Used inline function to avoid code duplication (Michal)
      
      v4:
       - Preset the GuC WOPCM top during early GuC init (Chris)
       - Fail intel_uc_init_hw() as soon as GuC WOPCM partitioning failed
      
      v5:
       - Moved GuC DMA WOPCM register updating code into intel_wopcm.c
       - Took care of the locking status before writing to GuC DMA
         Write-Once registers. (Joonas)
      
      v6:
       - Made sure the GuC WOPCM size to be multiple of 4K (4K aligned)
      
      v8:
       - Updated comments and fixed naming issues (Sagar/Joonas)
       - Updated commit message to include more description about the hardware
         restriction on GuC WOPCM size (Sagar)
      
      v9:
       - Minor changes variable names and code comments (Sagar)
       - Added detailed GuC WOPCM layout drawing (Sagar/Michal)
       - Refined macro definitions to be reader friendly (Michal)
       - Removed redundent check to valid flag (Michal)
       - Unified first parameter for exported GuC WOPCM functions (Michal)
       - Refined the name and parameter list of hardware restriction checking
         functions (Michal)
      
      v10:
       - Used shorter function name for internal functions (Joonas)
       - Moved init-ealry function into c file (Joonas)
       - Consolidated and removed redundant size checks (Joonas/Michal)
       - Removed unnecessary unlikely() from code which is only called once
         during boot (Joonas)
       - More fixes to kernel-doc format and content (Michal)
       - Avoided the use of PAGE_MASK for 4K pages (Michal)
       - Added error log messages to error paths (Michal)
      
      v11:
       - Replaced intel_guc_wopcm with more generic intel_wopcm and attached
         intel_wopcm to drm_i915_private instead intel_guc (Michal)
       - dynamic calculation of GuC non-wopcm memory start (a.k.a WOPCM Top
         offset from GuC WOPCM base) (Michal)
       - Moved WOPCM marco definitions into .c source file (Michal)
       - Exported WOPCM layout diagram as kernel-doc (Michal)
      
      v12:
       - Updated naming, function kernel-doc to align with new changes (Michal)
      
      v13:
       - Updated the ordering of s-o-b/cc/r-b tags (Sagar)
       - Corrected one tense error in comment (Sagar)
       - Corrected typos and removed spurious comments (Joonas)
      
      Bspec: 12690
      Signed-off-by: default avatarJackie Li <yaodong.li@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
      Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
      Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
      Cc: John Spotswood <john.a.spotswood@intel.com>
      Cc: Oscar Mateo <oscar.mateo@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v8)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v9)
      Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12)
      Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-2-git-send-email-yaodong.li@intel.com
      6b0478fb
    • Jackie Li's avatar
      drm/i915/guc: Rename guc_ggtt_offset to intel_guc_ggtt_offset · 3c009e3c
      Jackie Li authored
      GuC related exported functions should start with "intel_guc_" prefix and
      pass intel_guc as the first parameter since its GuC related. Current
      guc_ggtt_offset() failed to follow this code convention and this is a
      problem for future patches that needs to access intel_guc data to verify
      the GGTT offset against the GuC WOPCM top.
      
      This patch renames the guc_ggtt_offset to intel_guc_ggtt_offset and updates
      the related code to pass intel_guc pointer to this function call, so that
      we can have a unified coding style for GuC code and also enable the future
      patches to get GuC related data from intel_guc to do the offset
      verification. Meanwhile, this patch also moves the GUC_GGTT_TOP from
      intel_guc_regs.h to intel_guc.h since it is not GuC register related
      definition.
      
      v8:
       - Fixed coding style issues and moved GUC_GGTT_TOP to intel_guc.h (Sagar)
       - Updated commit message to explain to reason and motivation to add
         intel_guc as the first parameter of intel_guc_ggtt_offset (Chris)
      
      v9:
       - Fixed code alignment issue due to line break (Chris)
      
      v10:
       - Removed unnecessary comments, redundant code and avoided reuse variable
         to avoid potential issues (Joonas)
      
      v13:
       - Updated the ordering of s-o-b/cc/r-b tags (Sagar)
      Signed-off-by: default avatarJackie Li <yaodong.li@intel.com>
      Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
      Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: Sagar Arun Kamble <sagar.a.kamble@intel.com> (v8)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v9)
      Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> (v11)
      Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v12)
      Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/1520987574-19351-1-git-send-email-yaodong.li@intel.com
      3c009e3c
  2. 13 Mar, 2018 10 commits
  3. 12 Mar, 2018 4 commits
  4. 09 Mar, 2018 15 commits
  5. 08 Mar, 2018 2 commits