1. 26 Feb, 2024 20 commits
  2. 22 Feb, 2024 1 commit
  3. 19 Feb, 2024 2 commits
  4. 16 Feb, 2024 14 commits
  5. 15 Feb, 2024 2 commits
    • Dave Airlie's avatar
      Merge tag 'drm-intel-next-2024-02-07' of git://anongit.freedesktop.org/drm/drm-intel into drm-next · b13cfb44
      Dave Airlie authored
      drm/i915 feature pull for v6.9:
      
      Features and functionality:
      - Early transport for panel replay and PSR (Jouni)
      - New ARL PCI IDs (Matt)
      - DP TPS4 PHY test pattern support (Khaled)
      
      Refactoring and cleanups:
      - Unify and improve VSC SDP for PSR and non-PSR cases (Jouni)
      - Refactor memory regions and improve debug logging (Ville)
      - Rework global state serialization (Ville)
      - Remove unused CDCLK divider fields (Gustavo)
      - Unify HDCP connector logging format (Jani)
      - Use display instead of graphics version in display code (Jani)
      - Move VBT and opregion debugfs next to the implementation (Jani)
      - Abstract opregion interface, use opaque type (Jani)
      
      Fixes:
      - Fix MTL stolen memory access (Ville)
      - Fix initial display plane readout for MTL (Ville)
      - Fix HPD handling during driver init/shutdown (Imre)
      - Cursor vblank evasion fixes (Ville)
      - Various VSC SDP fixes (Jouni)
      - Allow PSR mode changes without full modeset (Jouni)
      - Fix CDCLK sanitization on module load for Xe2_LPD (Gustavo)
      - Fix the max DSC bpc supported by the source (Ankit)
      - Add missing LNL ALPM AUX wake configuration (Jouni)
      - Cx0 PHY state readout and verify fixes (Mika)
      - Fix PSR (panel replay) debugfs for MST connectors (Imre)
      - Fail HDCP repeater authentication if Type1 device not present (Suraj)
      - Ratelimit debug logging in vm_fault_ttm (Nirmoy)
      - Use a fake PCH for MTL because south display is not on the PCH (Haridhar)
      - Disable DSB for Xe driver for now (José)
      - Fix some LNL display register changes (Lucas)
      - Fix build on ChromeOS (Paz Zcharya)
      - Preserve current shared DPLL for fastsets on Type-C ports (Ville)
      - Fix state checker warnings for MG/TC/TBT PLLs (Ville)
      - Fix HDCP repeater ctl register value on errors (Jani)
      - Allow FBC with CCS modifiers on SKL+ (Ville)
      - Fix HDCP GGTT pinning (Ville)
      
      DRM core changes:
      - Add ratelimited drm dbg print (Nirmoy)
      - DPCD PSR early transport macro (Jouni)
      
      Merges:
      - Backmerge drm-next to bring Xe driver to drm-intel-next (Jani)
      Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
      From: Jani Nikula <jani.nikula@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/87cyt8cxsh.fsf@intel.com
      b13cfb44
    • John Harrison's avatar
      drm/i915/gt: Restart the heartbeat timer when forcing a pulse · eb927f01
      John Harrison authored
      The context persistence code does things like send super high priority
      heartbeat pulses to ensure any leaked context can still be pre-empted
      and thus isn't a total denial of service but only a minor denial of
      service. Unfortunately, it wasn't bothering to restart the heartbeat
      worker with a fresh timeout. Thus, if a persistent context happened to
      be closed just before the heartbeat was going to go ping anyway then
      the forced pulse would get a negligble execution time. And as the
      forced pulse is super high priority, the worker thread's next step is
      a reset. Which means a potentially innocent system randomly goes boom
      when attempting to close a context. So, force a re-schedule of the
      worker thread with the appropriate timeout.
      Signed-off-by: default avatarJohn Harrison <John.C.Harrison@Intel.com>
      Reviewed-by: default avatarAndi Shyti <andi.shyti@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20240110210216.4125092-1-John.C.Harrison@Intel.com
      eb927f01
  6. 14 Feb, 2024 1 commit