- 18 Jan, 2021 3 commits
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.12 - Restrict debug runtime-checks to Renesas platforms, - Initial support for the R-Car V3U SoC.
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YANG LI authored
Fix the following coccicheck warning: ./drivers/pinctrl/sprd/pinctrl-sprd.c:690:8-23: WARNING: Comparison to bool Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: YANG LI <abaci-bugfix@linux.alibaba.com> Reviewed-by: Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/1610440080-68600-1-git-send-email-abaci-bugfix@linux.alibaba.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Souptick Joarder authored
Kernel test robot throws below warning -> smatch warnings: drivers/pinctrl/ti/pinctrl-ti-iodelay.c:708 ti_iodelay_pinconf_group_dbg_show() warn: inconsistent indenting Fixed the inconsistent indenting. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Souptick Joarder <jrdr.linux@gmail.com> Link: https://lore.kernel.org/r/1610394585-4296-1-git-send-email-jrdr.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 14 Jan, 2021 18 commits
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Ulrich Hecht authored
Add pins, groups and functions for the 16-Bit Timer Pulse Unit outputs on the R-Car R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-13-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds TMU TCLK1-4 pins, groups and functions to the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-12-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
Add the QSPI0-1 pins, groups and functions to the R8A779A0 (V3U) PFC driver. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-11-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds PWM0-4 pins, groups and functions to the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-10-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds MSIOF0-5 pins, groups and functions to R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-9-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds MMC pins, groups and functions to R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165929.31002-8-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
Add pins, groups, and function for the Interrupt Controller for External Devices (INTC-EX) on the R-Car R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-7-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds HSCIF0-3 pins, groups and functions to the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165929.31002-6-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds DU pins, groups and function for the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-5-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds CANFD 0-7 and CANFD clock pinmux support for the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165929.31002-4-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds groups and function for AVB PHY, LINK, MAGIC, RGMII and PTP pins for the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165929.31002-3-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds I2C0-6 pins, groups and functions to the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165929.31002-2-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds SCIF0, 1, 3 and 4 pins, groups and functions for the R8A779A0 (V3U) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165912.30876-6-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds initial pinctrl support for the R8A779A0 (V3U) SoC, including bias, drive strength and voltage control. Based on patch by LUU HOAI <hoai.luu.ub@renesas.com>. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165912.30876-5-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165912.30876-4-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
This patch adds config macros describing the voltage levels available on a pin. The current default (3.3V/1.8V) maps to zero to avoid having to change existing PFC implementations. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165912.30876-3-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
The V3U SoC has several unlock registers, one per register group. They reside at offset zero in each 0x200 bytes-sized block. To avoid adding yet another table to the PFC implementation, this patch adds the option to specify an address mask instead of the fixed address in sh_pfc_soc_info::unlock_reg. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210112165912.30876-2-uli+renesas@fpond.euSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
Document PFC support for the R-Car V3U (R8A779A0) SoC. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20210112165912.30876-7-uli+renesas@fpond.eu [geert: increase reg maxItems to 10] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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- 12 Jan, 2021 1 commit
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Geert Uytterhoeven authored
When DEBUG is defined (e.g. if CONFIG_DEBUG_PINCTRL=y), the Renesas pin control driver runs sanity checks against the pin control tables. This may cause lots of output on the console, and can be annoying in ARM multi-platform kernels. Fix this by only running the checks when running on SuperH, or on a DT platform supported by the Renesas pin controller driver. Suggested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210111165013.496897-1-geert+renesas@glider.be
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- 06 Jan, 2021 1 commit
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Samuel Holland authored
As there is an RSB controller in the H6 SoC, there should be some pin configuration for it. While no such configuration is documented, the "s_i2c" pins are suspiciously on the "alternate" function 3, with no primary function 2 given. This suggests the primary function for these pins is actually RSB, and that is indeed the case. Add the "s_rsb" pin functions so the RSB controller can be used. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20210103100007.32867-3-samuel@sholland.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 05 Jan, 2021 1 commit
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Zhaoyu Liu authored
Remove all empty lines at the end of functions in pinctrl subsystem, and make the code neat. Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Zhaoyu Liu <zackaryliu@yeah.net> Link: https://lore.kernel.org/r/X98NP6NFK1Afzrgd@manjaroSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 04 Jan, 2021 12 commits
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Sergio Paracuellos authored
Kernel test robot reported the following warning: 'warning: no previous prototype for 'rt2880_pinmux_init''. This function is the entry point for the platform driver and it is private to this driver. Hence declare it 'static' which is the correct thing to do fixing also this warning. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20201228064727.30098-1-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
Avoid some boilerplate code using 'PTR_ERR_OR_ZERO' in probe function. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201213161721.6514-8-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
Some paths in probe function are returning '-EINVAL' instead of preserve original code from called functions. Change them to preserve all of them. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201213161721.6514-7-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
When '-ENOMEM' is returned there is not need at all to add custom error messages. Hence delete it. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201213161721.6514-6-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
Memory is being requested to the kernel but there is a missing check for NULL. Hence, add it. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201213161721.6514-5-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
Check for NULL shall return '-ENOMEM' instead of '-1'. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201213161721.6514-4-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
Double pointer is being used and assigned in a bit dirty way to assign functions in pinctrl. Instead of doing this just avoid it and use directly 'p->func' instead. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201213161721.6514-3-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sergio Paracuellos authored
When this bindings where applied there weren't already reviewed and some old hacks was being used to properly pass the schemas checks. This commits fix them up: - Instead of using 'if-then' clause use '-pins$'. - 'groups' and 'function' are included inside a new '^(.*-)?pinmux$' node. - compatible string is not an 'enum' but a 'const'. - 'pinctrl-0' and 'pinctrl-names' removed since they are used in consumer nodes. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20201213161721.6514-2-sergio.paracuellos@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zheng Yongjun authored
Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Link: https://lore.kernel.org/r/20201211084902.2480-1-zhengyongjun3@huawei.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zheng Yongjun authored
Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Link: https://lore.kernel.org/r/20201211084801.2425-1-zhengyongjun3@huawei.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zheng Yongjun authored
Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Link: https://lore.kernel.org/r/20201211084717.2371-1-zhengyongjun3@huawei.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Zheng Yongjun authored
Replace a comma between expression statements by a semicolon. Signed-off-by: Zheng Yongjun <zhengyongjun3@huawei.com> Link: https://lore.kernel.org/r/20201211084541.2318-1-zhengyongjun3@huawei.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 27 Dec, 2020 4 commits
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Linus Torvalds authored
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Linus Torvalds authored
Since commit 36e2c742 ("fs: don't allow splice read/write without explicit ops") we've required that file operation structures explicitly enable splice support, rather than falling back to the default handlers. Most /proc files use the indirect 'struct proc_ops' to describe their file operations, and were fixed up to support splice earlier in commits 40be821d..b24c30c6, but the mountinfo files interact with the VFS directly using their own 'struct file_operations' and got missed as a result. This adds the necessary support for splice to work for /proc/*/mountinfo and friends. Reported-by: Joan Bruguera Micó <joanbrugueram@gmail.com> Reported-by: Jussi Kivilinna <jussi.kivilinna@iki.fi> Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971 Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Christoph Hellwig <hch@lst.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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git://github.com/jonmason/ntbLinus Torvalds authored
Pull NTB fixes from Jon Mason: "Bug fix for IDT NTB and Intel NTB LTR management support" * tag 'ntb-5.11' of git://github.com/jonmason/ntb: ntb: intel: add Intel NTB LTR vendor support for gen4 NTB ntb: idt: fix error check in ntb_hw_idt.c
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git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds authored
Pull crypto fixes from Herbert Xu: "Fix a number of autobuild failures due to missing Kconfig dependencies" * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: crypto: qat - add CRYPTO_AES to Kconfig dependencies crypto: keembay - Add dependency on HAS_IOMEM crypto: keembay - CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 should depend on ARCH_KEEMBAY
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