- 26 Sep, 2017 40 commits
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Dmytro Laktyushkin authored
Signed-off-by:
Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Acked-by:
Harry Wentland <Harry.Wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Corbin McElhanney authored
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Corbin McElhanney <corbin.mcelhanney@amd.com> Reviewed-by:
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Leo (Sunpeng) Li authored
Do not broadcast (to DRM) unsupported RGB formats. Signed-off-by:
Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by:
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Hersen Wu authored
Signed-off-by:
Hersen Wu <hersenxs.wu@amd.com> Reviewed-by:
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Andrey Grodzovsky authored
Signed-off-by:
Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Signed-off-by:
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Amy Zhang authored
Signed-off-by:
Amy Zhang <Amy.Zhang@amd.com> Reviewed-by:
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Andrey Grodzovsky authored
Switch from legacy cursor to DRM cursor plane. Cursor is not an actual plane but more of a subplane of each pipe. Bind a DRM cursor plane instance to each CRTC. Eliminate seperate FB object allocation for cursor and clean dm_crtc_cursor_set. Signed-off-by:
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
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Harry Wentland authored
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Shirish S authored
This patch updates the YUV format supported to NV12 and NV21 and hence updates the offsets. BUG: SWDEV-119421 TEST: (On Chromium OS for Stoney Only) * Executed below tests to see YUV(underlay) & RGB planes on eDP plane_test --format XR24 --size 500x100 -p --format NV12 --size 500x500 Signed-off-by:Shirish S <shirish.s@amd.com> Reviewed-by:
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Jeff Smith authored
Signed-off-by:
Jeff Smith <whydoubt@gmail.com> Reviewed-by:
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Shirish S authored
The DCE engine triggers scan as soon as the luma address is updated, since it is updated before chroma address the chroma data is not scanned out properly or in order. This patch fixes this by re-ordering the same. BUG: SWDEV-119421 TEST: (On Chromium OS for Stoney Only) * Executed below tests to see YUV(underlay) & RGB planes on eDP plane_test --format XR24 --size 500x100 -p --format NV12 --size 500x500 * Chroma data is scanned properly. Signed-off-by: -
Hersen Wu authored
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Harry Wentland authored
make-kpkg doesn't seem to like it Signed-off-by:
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Andrey Grodzovsky authored
Use drm_atomic_crtc_needs_modeset instead. Signed-off-by:
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Jerry Zuo authored
Check if adding surface is failed to prevent NULL pointer deref. Signed-off-by:
Jerry Zuo <Jerry.Zuo@amd.com> Reviewed-by:
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Amy Zhang authored
Signed-off-by:
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Zeyu Fan authored
Signed-off-by:
Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by:
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Corbin McElhanney authored
Passing NULL as surfaceUpdates to dc_update_surfaces_and_stream now updates just the stream. Code that is dependent on srf_updates was moved below the NULL check. Signed-off-by:
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Charlene Liu authored
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Charlene Liu <charlene.liu@amd.com> Reviewed-by:
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Andrey Grodzovsky authored
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Andrey Grodzovsky authored
Summury of changes: 1: Both in check and commit Connector properties were handled as part of for_each(crtc) loop while they shoud have been handled in a dedicated for_each(connector) loop since they are connector properties. Moved. 2: Removed hacky plane add in amdgpu_dm_connector_atomic_set_property to force iteration on plane forconnector property. This was causing double call to commit_surface_for_stream both in crtc loop and plane loop. 3: Remove middleman DC interface and call dc_commit_surfaces_to_stream directly to increase code clarity. Remove it from atomic_commit. Signed-off-by:
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Harry Wentland authored
DCN bw calcs currently rely on the following gcc options: -mhard-float -msse -mpreferred-stack-boundary=4 We probably shouldn't really try building this on architectures other than x86. CC: Alex Deucher <Alexander.Deucher@amd.com> CC: Christian König <christian.koenig@amd.com> CC: Michel Dänzer <michel.daenzer@amd.com> CC: Tony Cheng <Tony.Cheng@amd.com> CC: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Signed-off-by:
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Andrey Grodzovsky authored
Scaler code in case of UPDATE_TYPE_MED was not called since new pipe context and current context are the same. Signed-off-by:
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Dmytro Laktyushkin authored
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Andrey Grodzovsky authored
This flag is needed to pass several of IGT test cases. Signed-off-by:
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Alex Deucher authored
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Rex Zhu authored
to free up drm mode_config info. fix issue: unload amdgpu, can't load amdgpu again. [drm:drm_debugfs_init [drm]] *ERROR* Cannot create /sys/kernel/debug/dri/0 [drm:drm_minor_register [drm]] *ERROR* DRM: Failed to initialize /sys/kernel/debug/dri. Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Acked-by:
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Harry Wentland authored
This will be NULL on a new stream. DC handles it gracefully. Signed-off-by:
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Harry Wentland authored
Signed-off-by:
Roman Li <Roman.Li@amd.com> Acked-by:
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Dmytro Laktyushkin authored
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Dmytro Laktyushkin authored
This is causing asserts for dce 8 and 10 since they do not contain this field. It is also unnecessary for later DCEs as it is left in it's default state of 0 Signed-off-by:
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Tony Cheng authored
need to program DCSURF_PRIMARY_SURFACE_ADDRESS last as HW automatically latch rest of addr regs on write when SURFACE_UPDATE_LOCK is not used Signed-off-by:
Yongqiang Sun <yongqiang.sun@amd.com> Acked-by:
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Andrey Grodzovsky authored
You cannot have modeset and flip in the same call for same CRTC, in such case it will be set mode and set plane, not a flip. Signed-off-by:
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Andrey Grodzovsky authored
Use DC interface to query for plane update type so in case of FULL update you flush any outstanding commits. Signed-off-by:
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Tom St Denis authored
Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Tom St Denis authored
Also change sizeof to be automatic based on type declaration. Signed-off-by:
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