There is not much point in having separate entries for the ARM/Renesas
ARM64 and ARM/SH-Mobile ARM architectures, as they have the same
maintainers, use the same development collaboration infrastructure, and
share many files.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/a869b8afdc47aa637ebeefcc1ca7bc61244f34b9.1660898008.git.geert+renesas@glider.be

Renesas fixes for v6.0

  - Fix the serial console on the Renesas White Hawk development board.

This patch adds r8a77980A V3H2 (= r8a77980 ES2) Condor-I board
basic support.
Signed-off-by: Andrey Dolnikov <andrey.dolnikov@cogentembedded.com>
Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87y1v64nko.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds r8a77980A V3H2 (= r8a77980 ES2) basic SoC
support. It is using r8a77980 (= V3H) setting as-is for now.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/87zgfm4nkw.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

We have V3H Condor board, and will have V3H2 Condor-I board.
This patch adds condor-common.dtsi to share the common settings
between these boards.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/r/871qsy625m.wl-kuninori.morimoto.gx@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

With 'unevaluatedProperties' support implemented, there are a number of
warnings when running dtbs_check:

arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: spi@ee200000: Unevaluated properties are not allowed ('clock-names' was unexpected)
	From schema: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml

The main problem is that the DT bindings do not allow clock-names.
So just drop the clock-names properties from the SoC DTSI files.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220829215128.5983-1-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add MSIOF nodes for R-Car S4-8.
Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
[thanh: added DMA]
Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
[wsa: removed mso clock from clocks-property]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220829124130.2412-1-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-7-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As RZ/G2 SoCs do not support DVFS, the "iic-dvfs" module was renamed to
"iic-pmic" in the RZ/G Series, 2nd Generation User’s Manual: Hardware
Rev. 1.00.

See also commit a636d803 ("arm64: dts: renesas: rzg2: Rename
i2c_dvfs to iic_pmic"), which apparently forgot to update RZ/G2H.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7d60653d4d63904dc025a133297a53eb885fa064.1661525361.git.geert+renesas@glider.be

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-6-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-5-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-4-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-3-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-2-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-4-phil.edworthy@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add device nodes for the I2C controllers that are not assigned to the
ISP.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-3-phil.edworthy@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The interrupt number for the HSCIF0 serial port, which serves as the
serial console on the White Hawk board, is incorrect, causing userspace
to hang immediately as soon as it tries to print something.
Kernel output is unaffected, as it is printed using polling.

Fixes: 987da486 ("arm64: dts: renesas: Add Renesas R8A779G0 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/751dcef40d4534e856ed49b1d5b3a3e8d365ec42.1661419377.git.geert+renesas@glider.be

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220804190846.128370-1-phil.edworthy@renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As per the RZ/G2UL Hardware User's Manual (Rev.1.00 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: cf40c968 ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-3-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As per the RZ/V2L Hardware User's Manual (Rev.1.00 Nov, 2021),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: 7c2b8198 ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Link: https://lore.kernel.org/r/20220802101534.1401342-2-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

As per the latest RZ/G2L Hardware User's Manual (Rev.1.10 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: f9a2adcc ("arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes")
Link: https://lore.kernel.org/r/20220802101534.1401342-1-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Replace the clk node names audio-clk{1,2} with audio{1,2}-clk as per
the device tree specification.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220729084527.388023-1-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add DMA properties to RSPI nodes to support DMA operation.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-4-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add DMA properties to RSPI nodes to support DMA operation.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-3-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add DMA properties to RSPI nodes to support DMA operation.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220728122312.189766-2-biju.das.jz@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220726210110.1444-3-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

The PHY interrupt (INT_N) pin is connected to IRQ2 and IRQ3 for ETH0
and ETH1 respectively.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220722151155.21100-4-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add macros for NMI and IRQ0-7 interrupts which map to SPI0-8 present on
RZ/G2L (and alike) SoC's so that these can be used in the first cell of
interrupt specifiers.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722151155.21100-2-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add support for the Renesas R-Car H3Ne-1.7G (R8A779MB) SoC, which is a
different grading of the R-Car H3-N (R8A77951) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/862a5eecc850cbb90af86a56513b644b638fb62b.1656072871.git.geert+renesas@glider.be

Add required properties in pinctrl node to handle GPIO interrupts.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-5-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add IRQC node to R9A07G054 (RZ/V2L) SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-4-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add required properties in pinctrl node to handle GPIO interrupts.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-3-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Add IRQC node to R9A07G044 (RZ/G2L) SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220718195651.7711-2-prabhakar.mahadev-lad.rj@bp.renesas.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This patch adds CMT{0|1|2|3} device nodes for R-Car S4-8 (r8a779f0) SoC.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220713101447.3804-3-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

This enables the on-board eMMC on the Spider board. Switch SW3 has to be
in the default (neutral) position. Other settings will not be supported
upstream!
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220711134656.277730-4-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Extracted from a larger BSP patch made by Linh Phung.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220711134656.277730-3-wsa+renesas@sang-engineering.comSigned-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Radix tree header includes gfp.h for __GFP_BITS_SHIFT only. Now we
have gfp_types.h for this.

Fixes powerpc allmodconfig build:

   In file included from include/linux/nodemask.h:97,
                    from include/linux/mmzone.h:17,
                    from include/linux/gfp.h:7,
                    from include/linux/radix-tree.h:12,
                    from include/linux/idr.h:15,
                    from include/linux/kernfs.h:12,
                    from include/linux/sysfs.h:16,
                    from include/linux/kobject.h:20,
                    from include/linux/pci.h:35,
                    from arch/powerpc/kernel/prom_init.c:24:
   include/linux/random.h: In function 'add_latent_entropy':
>> include/linux/random.h:25:46: error: 'latent_entropy' undeclared (first use in this function); did you mean 'add_latent_entropy'?
      25 |         add_device_randomness((const void *)&latent_entropy, sizeof(latent_entropy));
         |                                              ^~~~~~~~~~~~~~
         |                                              add_latent_entropy
   include/linux/random.h:25:46: note: each undeclared identifier is reported only once for each function it appears in
Reported-by: kernel test robot <lkp@intel.com>
CC: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
CC: Andrew Morton <akpm@linux-foundation.org>
CC: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Yury Norov <yury.norov@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Pull vfs lseek fix from Al Viro:
 "Fix proc_reg_llseek() breakage. Always had been possible if somebody
  left NULL ->proc_lseek, became a practical issue now"

* tag 'pull-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  take care to handle NULL ->proc_lseek()

Easily done now, just by clearing FMODE_LSEEK in ->f_mode
during proc_reg_open() for such entries.

Fixes: 868941b1 "fs: remove no_llseek"
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>