- 18 Jul, 2023 11 commits
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs42xx8 driver to use the more modern data structure. Acked-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by:
Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230713-asoc-cirrus-maple-v1-10-a62651831735@kernel.orgSigned-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs42l56 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs42l52 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs4270 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs4265 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs42l51 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs35l56 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs35l45 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs35l41 driver to use the more modern data structure. Tested-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs35l36 driver to use the more modern data structure. Acked-by:
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Mark Brown authored
Merge series from V sujith kumar Reddy <vsujithkumar.reddy@amd.corp-partner.google.com>: The Patch series consists of probe functionality support for amd platforms.
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- 17 Jul, 2023 18 commits
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Frank Li authored
The wm8960 codec is not readable, resulting in a NACK for address 0x3d (8-bit). This can partially indicate it. For example: wm8962 codec use the same address but is readable. This additional probe check will help prevent loading the wm8960 module incorrectly on wm8962 hardware. Signed-off-by:
Frank Li <Frank.Li@nxp.com> Acked-by:
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Mark Brown authored
Merge series from Chancel Liu <chancel.liu@nxp.com>: Support rpmsg sound card on i.MX93 platform.
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Mark Brown authored
Merge series from Mark Brown <broonie@kernel.org>: The maple tree register cache should now be a good replacement for the rbtree cache in almost all situations, update the Qualcomm CODEC drivers to use the newer cache.
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Rob Herring authored
The example in audio-graph-card2 binding is incomplete, uses undocumented compatibles strings, and doesn't follow typical .dts formatting. Rather than try to fix with what would probably be a lengthy example, just drop the example. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230707221725.1071292-1-robh@kernel.orgSigned-off-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
Yangtao Li <frank.li@vivo.com> Acked-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20230711034846.69437-5-frank.li@vivo.comSigned-off-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource_byname() to simplify code. Signed-off-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
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V sujith kumar Reddy authored
Add Probe register offset for renoir and rembrandt platform to get position update. Signed-off-by:
V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com> Link: https://lore.kernel.org/r/20230713125709.418851-4-vsujithkumar.reddy@amd.corp-partner.google.comSigned-off-by:
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V sujith kumar Reddy authored
This patch adds acp-probe id as a match id to support probe functionality for amd platforms. Signed-off-by:
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V sujith kumar Reddy authored
This patch consist of probe client device registration,stream tag and dma channel configuration for SOF firmware. Signed-off-by:
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Chancel Liu authored
Add compatible string and specific soc data to support rpmsg sound card on i.MX93 platform. Signed-off-by:
Chancel Liu <chancel.liu@nxp.com> Link: https://lore.kernel.org/r/20230714092913.1591195-3-chancel.liu@nxp.comSigned-off-by:
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Chancel Liu authored
Add compatible string for i.MX93 platform which supports audio function through rpmsg channel between Cortex-A and Cortex-M core. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wsa883x driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wsa881x driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wcd938x driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wcd9335 driver to use the more modern data structure. Signed-off-by:
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- 14 Jul, 2023 1 commit
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Zhu Ning authored
The internal analog power and hp Vref of es8326 should always be on to reduce pop noise. The HP_VOL and HP_CAL are moved to es8326_mute function so they are turned on at last and turned off at first. Also, the calibration should be done manually once during start-up to reduce DC offset on headphone. Signed-off-by:
Zhu Ning <zhuning0077@gmail.com> Link: https://lore.kernel.org/r/20230714032453.3334-1-zhuning0077@gmail.comSigned-off-by:
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- 13 Jul, 2023 10 commits
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Mark Brown authored
Merge series from Mark Brown <broonie@kernel.org>: The maple tree register cache has now got to feature parity with the rbtree cache, there are some different tradeoffs made and it should be a better choice for most modern systems. Convert the Analog Devices drivers to use the more modern data structure. Signed-off-by:
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Min-Hua Chen authored
This patch fixes the following sprse warning: sound/soc/qcom/qdsp6/q6apm.c:30:14: sparse: warning: symbol 'g_apm' was not declared. Should it be static? No functional change intended Signed-off-by:
Min-Hua Chen <minhuadotchen@gmail.com> Link: https://lore.kernel.org/r/20230713151744.86072-1-minhuadotchen@gmail.comSigned-off-by:
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Yang Li authored
sound/soc/amd/acp/acp-rembrandt.c:283 rmb_pcm_resume() warn: inconsistent indenting Reported-by:
Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5863Signed-off-by:
Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/20230713065106.21564-1-yang.lee@linux.alibaba.comSigned-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the adav80x driver to use the more modern data structure. Reviewed-by:
Nuno Sa <nuno.sa@analog.com> Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the adau7118 driver to use the more modern data structure. Reviewed-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the adau1977 driver to use the more modern data structure. Reviewed-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the adau1781 driver to use the more modern data structure. Reviewed-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the adau1761 driver to use the more modern data structure. Reviewed-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the adau1701 driver to use the more modern data structure. Reviewed-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the adau1373 driver to use the more modern data structure. Reviewed-by:
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