- 06 Jul, 2022 15 commits
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Marijn Suijten authored
These config values have been extracted from CodeLinaro's most recent trinket/sm6125 tag: https://git.codelinaro.org/clo/la/kernel/msm-4.14/-/blob/LA.UM.9.11.r1-05600-NICOBAR.QSSI12.0/arch/arm64/boot/dts/qcom/trinket.dtsiSigned-off-by:
Marijn Suijten <marijn.suijten@somainline.org> Signed-off-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220508100336.127176-3-marijn.suijten@somainline.org
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Marijn Suijten authored
According to qcom,sm6125-pinctrl.yaml all nodes inside the tlmm must be suffixed by -state: qcom/sm6125-sony-xperia-seine-pdx201.dtb: pinctrl@500000: 'sdc2-off', 'sdc2-on' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+' The label names have been updated to match, going from sdc2_state_X to sdc2_X_state. Fixes: cff4bbaf ("arm64: dts: qcom: Add support for SM6125") Fixes: 82e17838 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II") Signed-off-by: -
Marijn Suijten authored
Both the sdc2-on and sdc2-off pinctrl nodes are used by the sdhci@4784000 node in sm6125.dtsi. Surprisingly sdc2-off is defined in sm6125, yet its sdc2-on counterpart is only defined in board-specific DT for the Sony Seine PDX201 board/device resulting in an "undefined label &sdc2_state_on" error if sm6125.dtsi were included elsewhere. This sm6125 base dtsi should not rely on externally defined labels; the properties referencing it should then also be written externally. Since the sdc2-on pin configuration is board-independent just like sdc2-off, move it from seine-pdx201.dts into sm6125.dtsi. The SDCard-detect pin (gpio98) is however board-specific, and remains as an overwrite in seine-pdx201.dts for both the on and off state. As a drive-by cleanup, reorder bias- and drive-strength properties. Fixes: cff4bbaf ("arm64: dts: qcom: Add support for SM6125") Fixes: 82e17838 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II") Signed-off-by:
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Bjorn Andersson authored
The db820c has 4 "user LEDs", all connected to the PMI8994. The first three are connected to the three current sinks provided by the TRILED and the fourth is connected to MPP2. By utilizing the DTEST bus the MPP is fed the control signal from the fourth LPG block, providing a consistent interface to the user. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
Dylan Van Assche <me@dylanvanassche.be> Link: https://lore.kernel.org/r/20220505022706.1692554-5-bjorn.andersson@linaro.org
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Bjorn Andersson authored
The pmi8994 has 4 multi-purpose-pins, add these to the definition. Signed-off-by:
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Bjorn Andersson authored
The DB845c has 4 "user LEDs", the last one is already supported as it's just wired to a gpio. Now that the LPG binding is in place we can wire up the other 3 LEDs as well. Signed-off-by:
Caleb Connolly <caleb@connolly.tech> Reviewed-by:
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Bjorn Andersson authored
Add PWM/LPG nodes to the PMICs currently supported by the binding. Signed-off-by:
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Robert Foss authored
Replace &rpmhpd power domain integers with their respective defines in order to improve legibility. Signed-off-by:
Robert Foss <robert.foss@linaro.org> Reviewed-by:
Konrad Dybcio <konrad.dybcio@somainline.org> Reviewed-by:
Vinod Koul <vkoul@kernel.org> Signed-off-by:
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Robert Foss authored
Add the dispcc clock-controller DT node for sm8350. Signed-off-by:
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Bjorn Andersson authored
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Vladimir Zapolskiy authored
The change adds description of Qualcomm SM8450 camera clock controller. Signed-off-by:
Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by:
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Bjorn Andersson authored
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Vladimir Zapolskiy authored
The change adds device tree bindings for camera clock controller found on SM8450 SoC. Reviewed-by:
Rob Herring <robh@kernel.org> Reviewed-by:
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Jonathan Marek authored
Add sm8350 DISPCC bindings, which are simply a symlink to the sm8250 bindings. Update the documentation with the new compatible. Signed-off-by:
Jonathan Marek <jonathan@marek.ca> Signed-off-by:
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Robert Foss authored
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SM8350 SoCs. Signed-off-by:
Dmitry Baryshkov <dmityr.baryshkov@linaro.org> Reviewed-by:
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- 05 Jul, 2022 1 commit
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Yassine Oudjana authored
Add interconnect providers for the multiple NoCs available on the platform, and assign interconnects used by some blocks. Signed-off-by:
Yassine Oudjana <y.oudjana@protonmail.com> Signed-off-by:
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- 03 Jul, 2022 24 commits
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Bjorn Andersson authored
This merges the 'qcom-arm64-fixes-for-5.19' tag into arm64-for-5.20 to handle the merge conflict related to the header file changes in sc7180-trogdor.
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Stephen Boyd authored
Trogdor devices that have a detachable keyboard still have a non-detachable keyboard input device present because we include the cros-ec-keyboard.dtsi snippet in the top-level sc7180-trogdor.dtsi file that every variant board includes. We do this because the keyboard-controller node also provides some buttons like the power button and volume buttons. Unfortunately, this means we register a keyboard input device that doesn't do anything on boards with a detachable keyboard. Change the node's compatible on detachables to the newly introduced "google,cros-ec-keyb-switches" compatible to indicate that there are only switches and no keyboard to register. Similarly, move the keyboard include that defines the keyboard-controller node out of sc7180-trogdor.dtsi to boards that actually have a keyboard so that the matrix properties are not defined on boards with the switches compatible. Future boards can either use the include approach or the node definition approach to describe a keyboard with possible switches or just some switches. Cc: Benson Leung <bleung@chromium.org> Cc: Guenter Roeck <groeck@chromium.org> Cc: Douglas Anderson <dianders@chromium.org> Cc: Hsin-Yi Wang <hsinyi@chromium.org> Cc: "Joseph S. Barrera III" <joebar@chromium.org> Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Reviewed-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
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Robert Marko authored
Per schema it should be nand-controller@79b0000 instead of nand@79b0000. Fix it to match nand-controller.yaml requirements. Signed-off-by:
Robert Marko <robimarko@gmail.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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Dmitry Baryshkov authored
Both a53pll and rpmcc make use of xo as a clock parent. Add it to the respective device nodes. Signed-off-by:
Stephan Gerhold <stephan@gerhold.net> Acked-by:
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Dmitry Baryshkov authored
Add device nodes for the DSI1, second DSI interface found on MSM8996/APQ8096 platforms. For example on db820c it is routed to the secondary HS expansion connector. Signed-off-by:
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Dmitry Baryshkov authored
Add MDP_CLK ("core") clock to the mdss device to allow MDSS driver to access HW_REV/etc registers. Signed-off-by: -
Emma Anholt authored
This is an SMMU for the adreno gpu, and adding this compatible lets the driver use per-fd page tables, which are required for security between GPU clients. Signed-off-by:
Emma Anholt <emma@anholt.net> Reviewed-by:
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Lin, Meng-Bo authored
A3, A5 and most of the Samsung phones with MSM8916 SoC use GPIO pin 13 for touchscreen interrupts. Add touchscreen pinctrl to a2015 common dtsi. Signed-off-by:
Lin, Meng-Bo <linmengbo0689@protonmail.com> Signed-off-by:
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Dmitry Baryshkov authored
The HDMI driver doesn't use the phy-names to identify the PHY. Different Qualcomm platforms have used different names for the PHY. So, we are deprecating phy-names propertty of the HDMI device and dropping them from existing DTs. Signed-off-by:
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Krzysztof Kozlowski authored
The OCMEM bindings require ranges property. Fixes: 9d511d0a ("arm64: dts: qcom: msm8994: Add OCMEM node") Signed-off-by:
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Krzysztof Kozlowski authored
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by:
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Krzysztof Kozlowski authored
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by:
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Krzysztof Kozlowski authored
The IMEM node has children (PIL) which should be instantiated with simple-mfd. Signed-off-by:
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Krzysztof Kozlowski authored
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by:
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Krzysztof Kozlowski authored
Add proper compatibles to the IMEM device node: 1. syscon to allow accessing memory from other devices, 2. dedicated compatible as required for syscon and simple-mfd nodes. Signed-off-by:
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Krzysztof Kozlowski authored
According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by:
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Krzysztof Kozlowski authored
Add common LED properties - the function and color - to LED nodes. Signed-off-by:
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Krzysztof Kozlowski authored
Add common LED property - the function - to LED node. Signed-off-by:
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Krzysztof Kozlowski authored
Add common LED property - the function - to LED node. Signed-off-by:
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Krzysztof Kozlowski authored
Add common LED properties - the function and color - to LED nodes. Signed-off-by:
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Krzysztof Kozlowski authored
Add common LED properties - the function and color - to LED nodes. Signed-off-by:
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Vinod Koul authored
The soc node expects all the nodes to have unit addresses. The qup-opp-table does not have that which causes warnings: arch/arm64/boot/dts/qcom/sm8250.dtsi:916.32-933.5: Warning (simple_bus_reg): /soc@0/qup-opp-table: missing or empty reg/ranges property Move the qup-opp-table out of soc node to fix these warnings Signed-off-by:
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Vinod Koul authored
The soc node expects all the nodes to have unit addresses. The qup-opp-tables do not have that which causes warnings: arch/arm64/boot/dts/qcom/sm8350.dtsi:640.46-657.5: Warning (simple_bus_reg): /soc@0/qup-100mhz-opp-table: missing or empty reg/ranges property arch/arm64/boot/dts/qcom/sm8350.dtsi:659.46-676.5: Warning (simple_bus_reg): /soc@0/qup-120mhz-opp-table: missing or empty reg/ranges property Move the qup-opp-tables out of soc node to fix these warnings Signed-off-by:
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Vinod Koul authored
clk-virt and mc-virt interconnect nodes were named interconnect@0 and interconnect@1. That is incorrect as we don't have unit addresses 0/1 for these node. This causes warning: arch/arm64/boot/dts/qcom/sm8450.dtsi:255.27-259.4: Warning (unit_address_vs_reg): /interconnect@0: node has a unit name, but no reg or ranges property arch/arm64/boot/dts/qcom/sm8450.dtsi:261.26-265.4: Warning (unit_address_vs_reg): /interconnect@1: node has a unit name, but no reg or ranges property arch/arm64/boot/dts/qcom/sm8450.dtsi:255.27-259.4: Warning (unique_unit_address_if_enabled): /interconnect@0: duplicate unit-address (also used in node /soc@0) Rename the nodes to interconnect-0 and interconnect-1 to fix the warning. Signed-off-by:
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