- 20 Jun, 2022 17 commits
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Liu Ying authored
This patch adds a drm bridge driver for i.MX8qm LVDS display bridge(LDB) which is officially named as pixel mapper. The LDB has two channels. Each of them supports up to 30bpp parallel input color format and can map the input to VESA or JEIDA standards. The two channels can be used simultaneously, either in dual mode or split mode. In dual mode, the two channels output identical data. In split mode, channel0 outputs odd pixels and channel1 outputs even pixels. This patch supports the LDB single mode and split mode. Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # Colibri iMX8X, LT170410-2WHC, LP156WF1 Reviewed-by:
Robert Foss <robert.foss@linaro.org> Signed-off-by:
Liu Ying <victor.liu@nxp.com> Acked-by:
Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by:
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Liu Ying authored
This patch adds a drm bridge driver for i.MX8qxp LVDS display bridge(LDB) which is officially named as pixel mapper. The LDB has two channels. Each of them supports up to 24bpp parallel input color format and can map the input to VESA or JEIDA standards. The two channels cannot be used simultaneously, that is to say, the user should pick one of them to use. Two LDB channels from two LDB instances can work together in LDB split mode to support a dual link LVDS display. The channel indexes have to be different. Channel0 outputs odd pixels and channel1 outputs even pixels. This patch supports the LDB single mode and split mode. Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # Colibri iMX8X, LT170410-2WHC, LP156WF1 Reviewed-by:
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Liu Ying authored
This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB). Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Liu Ying authored
This patch adds a helper to support LDB drm bridge drivers for i.MX SoCs. Helper functions supported by this helper should implement common logics for all LDB modules embedded in i.MX SoCs. Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # Colibri iMX8X, LT170410-2WHC, LP156WF1 Reviewed-by:
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Liu Ying authored
This patch adds a drm bridge driver for i.MX8qxp pixel link to display pixel interface(PXL2DPI). The PXL2DPI interfaces the pixel link 36-bit data output and the DSI controller’s MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module used in LVDS mode, to remap the pixel color codings between those modules. The PXL2DPI is purely combinatorial. Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> # Colibri iMX8X, LT170410-2WHC, LP156WF1 Reviewed-by:
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Liu Ying authored
This patch adds bindings for i.MX8qxp pixel link to DPI(PXL2DPI). Reviewed-by:
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Liu Ying authored
This patch adds a drm bridge driver for i.MX8qm/qxp display pixel link. The pixel link forms a standard asynchronous linkage between pixel sources(display controller or camera module) and pixel consumers(imaging or displays). It consists of two distinct functions, a pixel transfer function and a control interface. Reviewed-by:
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Liu Ying authored
This patch adds bindings for i.MX8qm/qxp display pixel link. Signed-off-by:
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Liu Ying authored
This patch adds a drm bridge driver for i.MX8qm/qxp pixel combiner. The pixel combiner takes two output streams from a single display controller and manipulates the two streams to support a number of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as either one screen, two screens, or virtual screens. The pixel combiner is also responsible for generating some of the control signals for the pixel link output channel. For now, the driver only supports the bypass mode. Reviewed-by:
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Liu Ying authored
This patch adds bindings for i.MX8qm/qxp pixel combiner. Reviewed-by:
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Liu Ying authored
This patch adds documentations for RGB666_1X30_CPADLO, RGB888_1X30_CPADLO, RGB666_1X36_CPADLO and RGB888_1X36_CPADLO bus formats used by i.MX8qm/qxp pixel combiner. The RGB pixels with padding low per component are transmitted on a 30-bit input bus(10-bit per component) from a display controller or a 36-bit output bus(12-bit per component) to a pixel link. Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Liu Ying authored
This patch adds RGB666_1X30_CPADLO, RGB888_1X30_CPADLO, RGB666_1X36_CPADLO and RGB888_1X36_CPADLO bus formats used by i.MX8qm/qxp pixel combiner. The RGB pixels with padding low per component are transmitted on a 30-bit input bus(10-bit per component) from a display controller or a 36-bit output bus(12-bit per component) to a pixel link. Reviewed-by:
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Xin Ji authored
As V4L2_FWNODE_BUS_TYPE_PARALLEL not properly descript for DPI interface, this patch use new defined V4L2_FWNODE_BUS_TYPE_DPI for it. Fixes: fd0310b6 ("drm/bridge: anx7625: add MIPI DPI input feature") Signed-off-by:
Xin Ji <xji@analogixsemi.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Acked-by:
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Xin Ji authored
Add 'bus-type' and 'data-lanes' define, bus-type 7 for MIPI DPI input, others for DSI input. Signed-off-by:
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Thomas Zimmermann authored
Backmerging to get new regmap APIs of v5.19-rc1. Signed-off-by:Thomas Zimmermann <tzimmermann@suse.de>
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Helge Deller authored
The user may use the fbcon=vc:<n1>-<n2> option to tell fbcon to take over the given range (n1...n2) of consoles. The value for n1 and n2 needs to be a positive number and up to (MAX_NR_CONSOLES - 1). The given values were not fully checked against those boundaries yet. To fix the issue, convert first_fb_vc and last_fb_vc to unsigned integers and check them against the upper boundary, and make sure that first_fb_vc is smaller than last_fb_vc. Cc: stable@vger.kernel.org # v4.19+ Reviewed-by:
Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by:
Helge Deller <deller@gmx.de> Link: https://patchwork.freedesktop.org/patch/msgid/YpkYRMojilrtZIgM@p100
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Helge Deller authored
There is no need to directly skip over to the SCROLL_REDRAW case while the logo is still shown. When using DRM, this change has no effect because the code will reach the SCROLL_REDRAW case immediately anyway. But if you run an accelerated fbdev driver and have FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION enabled, console scrolling is slowed down by factors so that it feels as if you use a 9600 baud terminal. So, drop those unnecessary checks and speed up fbdev console acceleration during bootup. Cc: stable@vger.kernel.org # v5.10+ Acked-by:
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- 16 Jun, 2022 10 commits
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Lucas De Marchi authored
It's one argument, vaddr_iomem, not 2 (vaddr and _iomem). Signed-off-by:
Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220610232130.2865479-3-lucas.demarchi@intel.com
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pengfuyuan authored
Fix spelling typo in comments. Reported-by:
k2ci <kernel-bot@kylinos.cn> Signed-off-by:
pengfuyuan <pengfuyuan@kylinos.cn> Reviewed-by:
Lyude Paul <lyude@redhat.com> Signed-off-by:
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Imre Deak authored
The WD22TB4 Thunderbolt dock at least will revert its DP_MAX_LINK_RATE from HBR3 to HBR2 after system suspend/resume if the DP_DP13_DPCD_REV registers are not read subsequently also as required. Fix this by reading DP_DP13_DPCD_REV registers as well, matching what is done during connector detection. While at it also fix up the same call in drm_dp_mst_dump_topology(). Cc: Lyude Paul <lyude@redhat.com> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5292Signed-off-by:
Imre Deak <imre.deak@intel.com> Reviewed-by:
Jani Nikula <jani.nikula@intel.com> Cc: <stable@vger.kernel.org> # v5.14+ Reviewed-by:
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Samuel Holland authored
Now that the PHY ops are separated, sort them topologically, with the common sun8i_hdmi_phy_set_polarity helper at the top. No function contents are changed in this commit. Signed-off-by:
Samuel Holland <samuel@sholland.org> Signed-off-by:
Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20220615045543.62813-7-samuel@sholland.org
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Samuel Holland authored
Since the driver already needs to support multiple sets of ops, we can drop the mid-layer used by the A83T and H3 PHYs. They share only a small amount of code; factor this out as sun8i_hdmi_phy_set_polarity. For clarity, this commit keeps the existing function order. Signed-off-by:
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Samuel Holland authored
The D1 SoC comes with a new custom HDMI PHY, which does not share any registers with the existing custom PHY. So it needs a new set of ops. Instead of providing a flag in the variant structure, provide the ops themselves. Signed-off-by:
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Samuel Holland authored
Now that the HDMI PHY is using a platform driver, it can use device- managed resources. Use these, as well as the dev_err_probe helper, to simplify the probe function and get rid of the remove function. Signed-off-by:
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Samuel Holland authored
The struct resource is not used for anything else, so we can simplify the code a bit by using the helper function. Signed-off-by:
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Samuel Holland authored
Now that the HDMI PHY is using a platform driver, we can use the usual helper function for getting the variant structure. Signed-off-by:
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Alex Deucher authored
amdgpu_dm_crtc_late_register() is only used when CONFIG_DEBUG_FS is enabled so make it dependent on that. Fixes: 4cd79f61 ("drm/amd/display: Move connector debugfs to drm") Cc: Bhanuprakash Modem <bhanuprakash.modem@intel.com> Cc: Harry Wentland <harry.wentland@amd.com> Cc: Arun R Murthy <arun.r.murthy@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reported-by:
Randy Dunlap <rdunlap@infradead.org> Reported-by:
Nathan Chancellor <nathan@kernel.org> Reviewed-by:
Harry Wentland <harry.wentland@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Tested-by: Nathan Chancellor <nathan@kernel.org> # build Link: https://lists.freedesktop.org/archives/dri-devel/2022-June/359496.htmlSigned-off-by:
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- 15 Jun, 2022 3 commits
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git://anongit.freedesktop.org/drm/drm-miscDaniel Vetter authored
drm-misc-next for 5.20: UAPI Changes: * connector: export bpc limits in debugfs * dma-buf: Print buffer name in debugfs Cross-subsystem Changes: * dma-buf: Improve dma-fence handling; Cleanups * fbdev: Device-unregistering fixes Core Changes: * client: Only use driver-validated modes to avoid blank screen * dp-aux: Make probing more reliable; Small fixes * edit: CEA data-block iterators; Introduce struct drm_edid; Many cleanups * gem: Don't use framebuffer format's non-exising color planes * probe-helper: Use 640x480 as DisplayPort fallback; Refactoring * scheduler: Don't kill jobs in interrupt context Driver Changes: * amdgpu: Use atomic fence helpers in DM; Fix VRAM address calculation; Export CRTC bpc settings via debugfs * bridge: Add TI-DLPC3433; anx7625: Fixes; fy07024di26a30d: Optional GPIO reset; icn6211: Cleanups; ldb: Add reg and reg-name properties to bindings, Kconfig fixes; lt9611: Fix display sensing; lt9611uxc: Fixes; nwl-dsi: Fixes; ps8640: Cleanups; st7735r: Fixes; tc358767: DSI/DPI refactoring and DSI-to-eDP support, Fixes; ti-sn65dsi83: Fixes; * gma500: Cleanup connector I2C handling * hyperv: Unify VRAM allocation of Gen1 and Gen2 * i915: export CRTC bpc settings via debugfs * meson: Support YUV422 output; Refcount fixes * mgag200: Support damage clipping; Support gamma handling; Protect concurrent HW access; Fixes to connector; Store model-specific limits in device-info structure; Cleanups * nouveau: Fixes and Cleanups * panel: Kconfig fixes * panfrost: Valhall support * r128: Fix bit-shift overflow * rockchip: Locking fixes in error path; Minor cleanups * ssd130x: Fix built-in linkage * ttm: Cleanups * udl; Always advertize VGA connector * fbdev/vesa: Support COMPILE_TEST Signed-off-by:
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Zheng Bin authored
The driver uses crypto hash functions so it needs to select CRYPTO_HASH. This fixes build errors: drivers/gpu/drm/bridge/ite-it6505.o: in function `it6505_hdcp_wait_ksv_list': ite-it6505.c:(.text+0x4c26): undefined reference to `crypto_alloc_shash' ite-it6505.c:(.text+0x4c6d): undefined reference to `crypto_shash_digest' ite-it6505.c:(.text+0x4c7d): undefined reference to `crypto_destroy_tfm' ite-it6505.c:(.text+0x4d69): undefined reference to `crypto_destroy_tfm' Fixes: b5c84a9e ("drm/bridge: add it6505 driver") Signed-off-by:
Zheng Bin <zhengbin13@huawei.com> Reviewed-by:
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Nícolas F. R. A. Prado authored
While parsing the DT, the anx7625 driver checks for the presence of a panel bridge on endpoint 1. If it is missing, pdata->panel_bridge stores the error pointer and the function returns successfully without first cleaning that variable. This is an issue since other functions later check for the presence of a panel bridge by testing the trueness of that variable. In order to ensure proper behavior, zero out pdata->panel_bridge before returning when no panel bridge is found. Fixes: 9e82ea0f ("drm/bridge: anx7625: switch to devm_drm_of_get_bridge") Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by:
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- 13 Jun, 2022 9 commits
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Javier Martinez Canillas authored
This reverts commit fa0e2564. The kernel test robot reported that attempting to build the vesafb driver fails on some architectures, because these don't define a `struct screen_info`. This leads to linking errors, for example on parisc with allyesconfig: hppa-linux-ld: drivers/video/fbdev/vesafb.o: in function `vesafb_probe': >> (.text+0x738): undefined reference to `screen_info' >> hppa-linux-ld: (.text+0x73c): undefined reference to `screen_info' hppa-linux-ld: drivers/firmware/sysfb.o: in function `sysfb_init': >> (.init.text+0x28): undefined reference to `screen_info' >> hppa-linux-ld: (.init.text+0x30): undefined reference to `screen_info' hppa-linux-ld: (.init.text+0x78): undefined reference to `screen_info' The goal of commit fa0e2564 ("fbdev: vesafb: Allow to be built if COMPILE_TEST is enabled") was to have more build coverage for the driver but it wrongly assumed that all architectures would define a screen_info. Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Javier Martinez Canillas <javierm@redhat.com> Acked-by:
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Marek Vasut authored
Add missing header file into dsi_host.c and encode data-lanes string directly into the warning message in the driver to avoid build issues detected by lkp. Fixes: 185443ef ("drm/msm: Convert to drm_of_get_data_lanes_count") Reported-by:
Marek Vasut <marex@denx.de> Cc: Abhinav Kumar <quic_abhinavk@quicinc.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Maxime Ripard <maxime@cerno.tech> Cc: Rob Clark <robdclark@gmail.com> Cc: Robert Foss <robert.foss@linaro.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Sean Paul <sean@poorly.run> To: dri-devel@lists.freedesktop.org Reviewed-by:
Andrzej Hajda <andrzej.hajda@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220612143349.105766-1-marex@denx.de
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Jani Nikula authored
Abstract the .get_modes() connector helper call, including the override/firmware EDID fallback, for clarity. Signed-off-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/a4de51efc246e4f5bcbf7b84d66bb49aaf7fd974.1654674560.git.jani.nikula@intel.com
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Jani Nikula authored
Add new functions drm_edid_read(), drm_edid_read_ddc(), and drm_edid_read_custom() to replace drm_get_edid() and drm_do_get_edid() for reading the EDID. The transition is expected to happen over a fairly long time. Note that the new drm_edid_read*() functions do not do any of the connector updates anymore. The reading and parsing will be completely separated from each other. Add new functions drm_edid_alloc(), drm_edid_dup(), and drm_edid_free() for allocating and freeing drm_edid containers. Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by:
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Jani Nikula authored
We'll want to return the allocated buffer size in the future. Keep track of it. Signed-off-by:
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Jani Nikula authored
Add drm_edid based block count and data access helper functions that take the EDID allocated size into account. At the moment, the allocated size should always match the EDID size indicated by the extension count, but this will change in the future. Signed-off-by:
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Jani Nikula authored
Add a function to get the cea data block collection size. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by:
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Jani Nikula authored
The CTA Data Block Collection is valid only for CTA extension version 3. In versions 1 and 2, it is a reserved block, which we ignore. The DTD start offset (byte 2, or d in CTA-861 spec), which determines the CTA Data Block Collection size, is specified slightly differently for different versions: Version 1: d = offset for the byte following the reserved data block. If no data is provided in the reserved data block, then d=4. If no DTDs are provided, then d=0 Version 2: d = offset for the byte following the reserved data block. If no data is provided in the reserved data block, then d=4. If d=0, then no detailed timing descriptors are provided, and no data is provided in the reserved data block. Version 3: d = offset for the byte following the data block collection. If no data is provided in the data block collection, then d=4. If d=0, then no detailed timing descriptors are provided, and no data is provided in the data block collection. Ever since commit 9e50b9d5 ("drm: edid: Add some bounds checking"), we've interpreted 0 to mean there are no DTDs but it's all Data Blocks. Per the spec, Data Blocks are only valid for version 3, where we should interpret 0 to mean there are no data blocks. Follow the spec (and hope the EDIDs follow it too). Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: -
Yang Yingliang authored
If dma_fence_unwrap_merge() fails, it should return error code in drm_syncobj_transfer_to_timeline() Fixes: ec8d985f ("drm: use dma_fence_unwrap_merge() in drm_syncobj") Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Reviewed-by:
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- 12 Jun, 2022 1 commit
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Igor Torrente authored
Currently, the memory to the composition frame is being allocated using the kzmalloc. This comes with the limitation of maximum size of one page size(which in the x86_64 is 4Kb and 4MB for default and hugepage respectively). Somes test of igt (e.g. kms_plane@pixel-format) uses more than 4MB when testing some pixel formats like ARGB16161616 and the following error were showing up when running kms_plane@plane-panning-bottom-right*: [drm:vkms_composer_worker [vkms]] *ERROR* Cannot allocate memory for output frame. This problem is addessed by allocating the memory using kvzalloc that circunvents this limitation. V5: Improve the commit message and drop the debugging issues in VKMS TO-DO(Melissa Wen). Reviewed-by:
Melissa Wen <mwen@igalia.com> Signed-off-by:
Igor Torrente <igormtorrente@gmail.com> Signed-off-by:
Melissa Wen <melissa.srw@gmail.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220404204515.42144-2-igormtorrente@gmail.com
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