Commits · e7b07ceef2a650e5ed8ca37997689e086c680daf · Kirill Smelkov / linux

26 Sep, 2017 40 commits

drm/amd/display: Merge amdgpu_dm_types and amdgpu_dm · e7b07cee

Harry Wentland authored Aug 10, 2017

This separation stopped making sense a long time ago.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e7b07cee

drm/amd/display: Rename firmware_info to dc_firmware_info · 1515a47b

Harry Wentland authored Jul 26, 2017

This is to avoid conflicts with amdgpu's firmware_info once we
merge amdgpu_dm_types with amdgpu_dm.
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1515a47b

drm/amd/display: update clocks we report to PPlib · 1c3fb02d

Eric Yang authored Jul 26, 2017

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1c3fb02d

drm/amd/display: add detect caps for edp · 4654a2f7

Roman Li authored Jul 26, 2017

1. The caps detect sequence for edp is different from dp.
   Added separate function for edp.
2. Removed max_link_setting and replaced it with verified
   to avoid confusion.
3. Reverted sink count guard for edp powerdown as unnecessary
   with the changes above.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4654a2f7

drm/amd/display: fix mpcc idle wait · cd273548

Dmytro Laktyushkin authored Jul 26, 2017

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

cd273548

drm/amd/display: mpc block redesign · cc408d72

Dmytro Laktyushkin authored Jul 21, 2017

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

cc408d72

drm/amd/display: collapse dce11 reset_hw_ctx_wrap into 1 function · 54e8695e

Dmytro Laktyushkin authored Jul 26, 2017

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

54e8695e

drm/amd/display: safeguard compressor api · 2f3bfb27

Roman Li authored Jul 26, 2017

Only call compressor api if it's available.
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2f3bfb27

drm/amd/display: reduce 40s time out to 1s in disable crtc · 4d6356b0

Eric Yang authored Jul 26, 2017

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4d6356b0

drm/amd/display: Roll stream into dc_stream · a989ab08

Leo (Sunpeng) Li authored Jul 26, 2017

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

a989ab08

drm/amd/display: Roll core_stream into dc_stream · 4fa086b9

Leo (Sunpeng) Li authored Jul 25, 2017

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4fa086b9

drm/amd/display: log HUBP using DTN logging · 2248eb6b

Tony Cheng authored Jul 25, 2017

also simplify DTN INFO.  all we need is a way to have DC log register states
some where we can compare with golden.  going through connectivity is overkill.
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2248eb6b

drm/amd/display: Add interfaces for new CM blocks · d1f69890

Vitaly Prosyak authored Jul 25, 2017

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

d1f69890

drm/amd/display: Disable timestamp and entry heading · 8d6a615a

Yongqiang Sun authored Jul 25, 2017

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8d6a615a

drm/amd/display: Minor fix for dc_sink refactor · b3d6c3f0

Harry Wentland authored Jul 24, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b3d6c3f0

drm/amd/display: Clean up some DCN1 guards · 3639fa68

Zeyu Fan authored Jul 25, 2017

Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

3639fa68

drm/amd/display: move ocsc programming from opp to dpp · f4d5abf5

Yue Hin Lau authored Jul 25, 2017

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

f4d5abf5

drm/amd/display: Fix eDP panel light-up · 48841a20

Roman Li authored Jul 25, 2017

 Power-down panel on disale only if sink exists
 otherwise it fails edid read during init sequence
Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

48841a20

drm/amd/display: Use stream validation hook. · 4017fcdf

Andrey Grodzovsky authored Jul 24, 2017

Use dc_validate_stream from crtc atomic_check for single stream
validation.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4017fcdf

drm/amd/display: Move stream validations into seperate function. · 9345d987

Andrey Grodzovsky authored Jul 21, 2017

Stateless streams validations (not require resource population)
moved into hook to be called directly from DM.

Call dc_validate_stream be before validate_with_context for
non Linux APIs
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

9345d987

drm/amd/display: break up plane disable and disconnect in set mode · 6be425f3

Eric Yang authored Jul 24, 2017

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

6be425f3

drm/amd/display: separate plane disable sequence · a74b2734

Tony Cheng authored Jul 23, 2017

- disconnect:  trigger hw to disconnect plane on next vsync
- disable: disables HW block and disable clocks
- power_down: kill power
Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

a74b2734

drm/amd/display: single PSR display not allow CSTATE sw w/a · ee356d8f

Charlene Liu authored Jul 24, 2017

Description:
HW issue when all the pipes are off, DCE_allow_cstate is 0.
New sequence : blank OTG only instead of previous OTG_master_en=0)
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

ee356d8f

drm/amd/display: Roll core_gamma into dc_gamma · 7a6c4af6

Harry Wentland authored Jul 24, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

7a6c4af6

drm/amd/display: Roll gamma struct into core_gamma · 0b0aab86

Harry Wentland authored Jul 24, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

0b0aab86

drm/amd/display: Roll core_sink into dc_sink · b73a22d3

Harry Wentland authored Jul 24, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b73a22d3

drm/amd/display: Roll sink struct into core_sink · 89899039

Harry Wentland authored Jul 24, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

89899039

drm/amd/display: Roll core_link into dc_link · d0778ebf

Harry Wentland authored Jul 22, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

d0778ebf

drm/amd/display: Roll core_surface into dc_surface · e12cfcb1

Harry Wentland authored Jul 20, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e12cfcb1

drm/amd/display: Move DCHUBBUB block from MemInput to HW sequencer. · 08b16886

Zeyu Fan authored Jul 23, 2017

Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

08b16886

drm/amd/display: move RGAM programming from opp to dpp · c8d7bd8b

Yue Hin Lau authored Jul 23, 2017

Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

c8d7bd8b

drm/amd/display: fix YCbCr420 deep color mode not supported · e63825be

Charlene Liu authored Jul 23, 2017

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

e63825be

drm/amd/display: add missing func for dce11o to avoid crash · b6762f0c

Eric Yang authored Jul 24, 2017

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

b6762f0c

drm/amd/display: move ocsc programming from opp to dpp · 7db90a6b

Tony Cheng authored Jul 22, 2017

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yuehin Lau <Yuehin.Lau@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

7db90a6b

drm/amd/display: add idle wait for passive surface update and modeset · 87480687

Eric Yang authored Jul 23, 2017

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

87480687

drm/amd/display: Fix generic_reg_wait 1000ms case · 755d3bcf

Eric Yang authored Jul 23, 2017

Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

755d3bcf

drm/amd/display: move VGA to HWSS from TG · 0a87425a

Tony Cheng authored Jul 12, 2017

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Zeyu Fan <Zeyu.Fan@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

0a87425a

drm/amd/display: fix decide_link_settings · 8c4abe0b

Ding Wang authored Jul 18, 2017

Signed-off-by: Ding Wang <Ding.Wang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

8c4abe0b

drm/amd/display: Roll surface struct into core_surface · 03618e91

Harry Wentland authored Jul 20, 2017

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

03618e91

drm/amd/display: support for updated register headers on DCN · 51666631

Dmytro Laktyushkin authored Jul 21, 2017

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

51666631