- 05 Sep, 2016 5 commits
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Chris Brandt authored
Add the initial device tree for the RZ/A1 based development board (RSK). Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Chris Brandt authored
Add RSKRZA1 Device tree bindings Documentation, listing it as a supported board. This allows to use checkpatch to validate DTSes referring to the RSKRZA1 board. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
R8A7792 SoC doesn't have the EtherMAC core, so SMSC LAN89218 Ethernet chip was used instead on the Wheat debug board; this chip is compatible with SMSC LAN9115 for which there's a (device tree aware) driver. Describe the chip in the Wheat device tree unconditionally (the driver should fail the probe if the debug board isn't connected); enable DHCP and NFS root in the command line for the kernel boot... Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add the initial device tree for the R8A7792 SoC based Wheat board. The Wheat board itself has no serial ports wired up, the USB serial chips are situated on a separate debug board and one of them is connected to SCFI0 -- include unconditional support for it, so that the serial console can work. Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Document the Wheat device tree bindings, listing it as a supported board. This allows to use checkpatch.pl to validate .dts files referring to the Wheat board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 26 Aug, 2016 1 commit
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Sergei Shtylyov authored
Add support for the general purpose LEDs on the Blanche board. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 23 Aug, 2016 4 commits
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Sergei Shtylyov authored
Describe 3 instances (VSPS, VSPD0, and VSPD1) of the VSP1V in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the VSP1V clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the Blanche board dependent part of the DU device node. Add the device nodes for the Analog Devices ADV7511W HDMI transmitter (connected to DU0) and ADV7123 video DAC (connected to DU1). Add the necessary subnodes to interconnect DU, HDMI/VDAC devices, and HDMI/VGA connectors. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the Blanche board dependent part of the SDHI0 (connected to the micro-SD slot) device node along with the necessary voltage regulator. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 22 Aug, 2016 1 commit
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Sergei Shtylyov authored
Add support for the general purpose software switches SW2 and tactile switches SW24/25 as a virtual keyboard (like it was done with the Lager/ Koelsch boards). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 17 Aug, 2016 5 commits
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Geert Uytterhoeven authored
As of commit 5aa2eb3c ("[media] v4l: vsp1: Configure device based on IP version"), the DT properties to identify the exact VSP device instance features are no longer used. Hence remove them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
As of commit 5aa2eb3c ("[media] v4l: vsp1: Configure device based on IP version"), the DT properties to identify the exact VSP device instance features are no longer used. Hence remove them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
Define the Alt board dependent part of the MMCIF device node. Like the Silk the board has eMMC chip along with the necessary voltage regulator (note that the Vcc/Vccq regulator is dummy -- it's required by the MMCIF driver but doesn't actually exist on the board). Based on work for the Silk board by Vladimir Barinov and Sergei Shtylyov. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
Define the Alt board dependent part of the SDHI0 and 1 device nodes along with the necessary voltage regulators. Based on work by the original patch by Vladimir Barinov and Sergei Shtylyov for the Silk board. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe two instances (VSPS and VSPD0) of the VSP1 in the R8A7794 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 09 Aug, 2016 15 commits
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Sergei Shtylyov authored
Define the generic R8A7792 part of the DU device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the DU0/1 clocks and their parent, ZX clock in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Commit 2a0900655d5e (ARM: dts: r8a7792: add I2C support) had a wrongly indented line at the end of the "aliases" subnode -- fix it. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the SILK board dependent part of the R8A7794 sound device node. Add device node for Asahi Kasei AK4643 stereo codec to the I2C1 bus. Add the "simple-audio-card" device node to interconnect the SoC sound device and the codec. This patch is based on the commit 493b4da7 ("ARM: dts: porter: add sound support"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7794 part of the sound device node. This sound device is a complex one and comprises the Audio Clock Generator (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit] (SSI[U]), and Audio DMAC-Peripheral-Peripheral. It is up to the board file to enable the device. This patch is based on the R8A7791 sound work by Kuninori Morimoto. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe Audio-DMAC in the R8A7794 device tree. This patch is loosely based on the commit 8994fff6 ("ARM: shmobile: r8a7791: Add Audio DMAC devices to DT"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add MSTP10 clocks to the R8A7794 device tree. This patch is based on the commit ee914152 ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add some MSTP5 clocks to the R8A7794 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the external audio clocks (signals AUDIO_CLK[ABC]) required by the sound driver. Boards that provide audio clocks need to override the clock frequencies. This patch is based on the commit 0d3dbde8 ("ARM: shmobile: r8a7791: add audio clock on DTSI"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 parts of the VIN[0-5] device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the VIN[0-5] clocks and their parent, ZG clock in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 parts of the I2C[0-5] device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the I2C[0-5] clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 part of the SDHI0 device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the SDHI0 clock and its parent, SD clock in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 08 Aug, 2016 9 commits
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Simon Horman authored
r8a7794 SDHI ch0 has SD_DMACR which is located in 0x324. This patch updates register size Based on work for the r8a7790 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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Sergei Shtylyov authored
Define the Blanche board dependent part of the CAN0 device node along with the CAN_CLK crystal. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 parts of the CAN0/1 device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and the external clock fed on the CAN_CLK pin. Describe those clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 part of the EtherAVB device node. Based on the commit 89aac8af ("ARM: dts: r8a7794: add EtherAVB support"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add the EtherAVB clock and its parent, HP clock to the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe all 12 GPIO controllers in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the GPIO clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add the (previously omitted) pin data for the SMSC LAN89218 Ethernet chip to the Blanche board's device tree: the chip's IRQ output is connected to the SoC's IRQ0 pin and its nCS input is connected to the SoC's EX_CS0# pin. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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