- 19 May, 2022 3 commits
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Krzysztof Kozlowski authored
The DTS should always have fixed clock order, even if it comes with clock-names property. Drop the pattern to make the order strict. Existing DTS already match this. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by:
Alim Akhtar <alim.akhtar@samsung.com> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Krzysztof Kozlowski authored
There is no need to add minItems when it is equal to maxItems. Signed-off-by:
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Krzysztof Kozlowski authored
There is no need to add minItems when it is equal to maxItems. Signed-off-by:
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- 18 May, 2022 1 commit
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Shubhrajyoti Datta authored
Convert the ipi doc to yaml. Signed-off-by:
Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Signed-off-by:
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- 17 May, 2022 6 commits
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Oleksij Rempel authored
This documentation provides wrong node name for the Ethernet controller. It should be "ethernet" instead of "smsc" as required by Ethernet controller devicetree schema: Documentation/devicetree/bindings/net/ethernet-controller.yaml Signed-off-by:
Oleksij Rempel <o.rempel@pengutronix.de> Acked-by:
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Oleksij Rempel authored
Create initial schema for Microchip/SMSC LAN95xx USB Ethernet controllers and import some of currently supported USB IDs form drivers/net/usb/smsc95xx.c These devices are already used in some of DTs. So, this schema makes it official. NOTE: there was no previously documented txt based DT binding for this controllers. Signed-off-by:
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Oleksij Rempel authored
Create schema for ASIX USB Ethernet controllers and import some of currently supported USB IDs form drivers/net/usb/asix_devices.c These devices are already used in some of DTs. So, this schema makes it official. NOTE: there was no previously documented txt based DT binding for this controllers. Signed-off-by:
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Andre Przywara authored
When we boot a machine using a devicetree, the generic DT code goes through all nodes with a 'device_type = "memory"' property, and collects all memory banks mentioned there. However it does not check for the status property, so any nodes which are explicitly "disabled" will still be added as a memblock. This ends up badly for QEMU, when booting with secure firmware on arm/arm64 machines, because QEMU adds a node describing secure-only memory: =================== secram@e000000 { secure-status = "okay"; status = "disabled"; reg = <0x00 0xe000000 0x00 0x1000000>; device_type = "memory"; }; =================== The kernel will eventually use that memory block (which is located below the main DRAM bank), but accesses to that will be answered with an SError: =================== [ 0.000000] Internal error: synchronous external abort: 96000050 [#1] PREEMPT SMP [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 5.18.0-rc6-00014-g10c8acb8b679 #524 [ 0.000000] Hardware name: linux,dummy-virt (DT) [ 0.000000] pstate: 200000c5 (nzCv daIF -PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 0.000000] pc : new_slab+0x190/0x340 [ 0.000000] lr : new_slab+0x184/0x340 [ 0.000000] sp : ffff80000a4b3d10 .... ================== The actual crash location and call stack will be somewhat random, and depend on the specific allocation of that physical memory range. As the DT spec[1] explicitly mentions standard properties, add a simple check to skip over disabled memory nodes, so that we only use memory that is meant for non-secure code to use. That fixes booting a QEMU arm64 VM with EL3 enabled ("secure=on"), when not using UEFI. In this case the QEMU generated DT will be handed on to the kernel, which will see the secram node. This issue is reproducible when using TF-A together with U-Boot as firmware, then booting with the "booti" command. When using U-Boot as an UEFI provider, the code there [2] explicitly filters for disabled nodes when generating the UEFI memory map, so we are safe. EDK/2 only reads the first bank of the first DT memory node [3] to learn about memory, so we got lucky there. [1] https://github.com/devicetree-org/devicetree-specification/blob/main/source/chapter3-devicenodes.rst#memory-node (after the table) [2] https://source.denx.de/u-boot/u-boot/-/blob/master/lib/fdtdec.c#L1061-1063 [3] https://github.com/tianocore/edk2/blob/master/ArmVirtPkg/PrePi/FdtParser.cReported-by:Ross Burton <ross.burton@arm.com> Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Signed-off-by:
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Ken Kurematsu authored
Fix typo "cortex" Signed-off-by:
Ken Kurematsu <k.kurematsu@nskint.co.jp> Acked-by:
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Gene Chen authored
Add bindings child nodes for the Mediatek MT6360 Signed-off-by:
Gene Chen <gene_chen@richtek.com> Link: https://lore.kernel.org/all/YmqTzlrVL5KaVPuz@robh.at.kernel.org/Signed-off-by:
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- 09 May, 2022 12 commits
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Rob Herring authored
Pick up new meta-schema fixes.
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Andre Przywara authored
The Arm Komeda (aka Mali-D71) is a display controller that scans out a framebuffer and hands a signal to a digital encoder to generate a DVI or HDMI signal. It supports up to two pipelines, each frame can be composed of up to four layers. Convert the existing DT binding to DT schema. Signed-off-by:
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Andre Przywara authored
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans out a framebuffer and hands the pixels over to a digital signal encoder. It supports multiple layers, scaling and rotation. Convert the existing DT binding to DT schema. Signed-off-by:
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Andre Przywara authored
The Arm HDLCD is a display controller that scans out a framebuffer and hands a signal to a digital encoder to generate a DVI or HDMI signal. Convert the existing DT binding to DT schema. Signed-off-by:
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Andre Przywara authored
The Arm PL110 and PL111 are IP blocks that provide a display engine with an LCD interface, being able to drive a variety of LC panels. Convert the binding over to DT schema, to the DTs can be automatically checked. This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property, because this is used by several DTs in the tree. Signed-off-by:
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Andre Przywara authored
The Arm Versatile Express system features a bridge device that provides access to various smaller devices like clocks, reset gates and various sensors. Extract the second half of the informal vexpress-sysreg.txt binding and make it proper DT schema compliant. This makes the old .txt binding redundant, so remove it. This describes both the actual parent configuration bridge, as well as all the possible children devices. Signed-off-by:
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Andre Przywara authored
The Arm Versatile Express system control register block provides GPIO functionality to some devices and is also used for board identification. Extract the first half of the informal vexpress-sysreg.txt binding and make it proper DT schema compliant. Signed-off-by:
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Andre Przywara authored
The Arm PL050 "Keyboard/Mouse Interface" is an Arm system IP providing a PS/2 compatible serial interface. Add a simple DT schema binding, based on the TRM[1], the existing DTs and the Linux driver. [1] https://developer.arm.com/documentation/ddi0143/latestSigned-off-by:
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Andre Przywara authored
The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is a peripheral that provides communication with an audio CODEC. Add a simple DT schema binding for it, so that DTs can be validated automatically. Signed-off-by:
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Andre Przywara authored
The Arm SP810 IP is a "system controller", providing clocks, timer and a watchdog. Convert the DT binding to DT schema, to allow automatic validation. The existing .txt binding described all properties as required, but the assigned-clock* and clock-output-names are actually not (from a hardware perspective). The only existing driver I could find (in Linux) doesn't require them either, so drop those properties from the "required" list. Signed-off-by:
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Andre Przywara authored
Convert the Arm Statisical Profiling Extension (SPE) binding to DT schema. Not much to see here, basically just the announcement that SPE is integrated on the system level and where the IRQ is routed to. Move it into the more suitable perf/ directory on the way. Signed-off-by:
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Andre Przywara authored
The Page Request Interface (PRI) is an optional PCIe feature. As such, a SMMU would not need to handle it if the PCIe host bridge or the SMMU itself do not implement it. Also an SMMU could be connected to a platform device, without any PRI functionality whatsoever. In all cases there would be no SMMU PRI queue interrupt to be wired up to an interrupt controller. At the moment, with the "eventq,gerror,priq,cmdq-sync" order, we would need to sacrifice the command queue sync interrupt as well, which might not be desired. Relax the binding to allow specifying certain useful combinations of wired interrupts, for instance just the "gerror" interrupt, or omitting both "pri" and "cmdq-sync". Signed-off-by:
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- 06 May, 2022 1 commit
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Rob Herring authored
This reverts commit 694ed992. The same commit was also applied to stm32 tree. Signed-off-by:
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- 05 May, 2022 1 commit
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Stanislav Jakubek authored
Convert RDA Micro Timer bindings to DT schema format. Signed-off-by:
Stanislav Jakubek <stano.jakubek@gmail.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
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- 04 May, 2022 3 commits
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Hector Martin authored
We no longer use these since 111659c2 (and they never worked anyway); drop them from the example to avoid confusion. Fixes: 111659c2 ("arm64: dts: apple: t8103: Remove PCIe max-link-speed properties") Signed-off-by:
Hector Martin <marcan@marcan.st> Reviewed-by:
Alyssa Rosenzweig <alyssa@rosenzweig.io> Signed-off-by:
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Rob Herring authored
Another round of removing redundant minItems/maxItems when 'items' list is specified. This time it is in if/then schemas as the meta-schema was failing to check this case. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. Signed-off-by:
Vinod Koul <vkoul@kernel.org> Acked-by:
Marc Kleine-Budde <mkl@pengutronix.de> Acked-by:
Mark Brown <broonie@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> #for IIO Link: https://lore.kernel.org/r/20220503162738.3827041-1-robh@kernel.org
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Rob Herring authored
A few platforms, at91 and tegra, use drive-push-pull and drive-open-drain with a 0 or 1 value. There's not really a need for values as '1' should be equivalent to no value (it wasn't treated that way) and drive-push-pull disabled is equivalent to drive-open-drain. So dropping the value can't be done without breaking existing OSs. As we don't want new cases, mark the case with values as deprecated. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by:
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- 03 May, 2022 8 commits
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Kuldeep Singh authored
GENI(generic interface) based Qualcomm Universal Peripheral controller can support multiple serial interfaces like SPI,UART and I2C. Unlike other I2C controllers, QUP I2C bindings are present in parent schema. Move it out from parent to an individual binding and let parent refer to child schema later on. Please note, current schema isn't complete as it misses out few properties and thus, add these missing properties along the process. Signed-off-by:
Kuldeep Singh <singh.kuldeep87k@gmail.com> Reviewed-by:
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Frank Rowand authored
New unittests for overlay notifiers reveal a memory leak in of_overlay_apply() when a notifier returns an error for action OF_OVERLAY_POST_APPLY. The pr_err() message is: OF: ERROR: memory leak, expected refcount 1 instead of 3, of_node_get()/of_node_put() unbalanced - destroy cset entry: attach overlay node /testcase-data/overlay-node/test-bus/test-unittest17 Change the error path to no longer call free_overlay_changeset(), and document that the caller of of_overlay_fdt_apply() may choose to remove the overlay. Update the unittest that triggered the error to expect the changed return values and to call of_overlay_remove(). Signed-off-by:
Frank Rowand <frank.rowand@sony.com> Signed-off-by:
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Frank Rowand authored
Add tests for overlay apply and remove notifiers. Trigger errors for each of the notifier actions. These tests will reveal a memory leak problem when a notifier returns an error for action OF_OVERLAY_POST_APPLY. The pr_err() message is: OF: ERROR: memory leak, expected refcount 1 instead of 3, of_node_get()/of_node_put() unbalanced - destroy cset entry: attach overlay node /testcase-data/overlay-node/test-bus/test-unittest17 Signed-off-by:
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Frank Rowand authored
The values of enum of_overlay_notify_action are used to index into array of_overlay_action_name. Add an entry to of_overlay_action_name for the value recently added to of_overlay_notify_action. Array of_overlay_action_name[] is moved into include/linux/of.h adjacent to enum of_overlay_notify_action to make the connection between the two more obvious if either is modified in the future. The only use of of_overlay_action_name is for error reporting in overlay_notify(). All callers of overlay_notify() report the same error, but with fewer details. Remove the redundant error reports in the callers. Fixes: 067c0987 ("of: overlay: rework overlay apply and remove kfree()s") Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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David Heidelberg authored
These missing required properties are needed for smp2p binding reference checks. Also includes cosmetic change to the example formatting. Reviewed-by:
David Heidelberg <david@ixit.cz> Reviewed-by:
Manivannan Sadhasivam <mani@kernel.org> Signed-off-by:
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David Heidelberg authored
Fill missing compatible already used in SM8450 DTS. Signed-off-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by:
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Linus Walleij authored
The Broadcom BCM4751 family of (A-)GPS chips have been around for some years. The latest iteration BCM4753 is for example mounted on the Huawei HiKey970. Cc: devicetree@vger.kernel.org Cc: phone-devel@vger.kernel.org Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Rob Herring authored
The samsung,s524ad0xd1 compatible is in use, but not documented. According to arch/arm/mach-s3c/mach-smdk6410.c, the samsung,s524ad0xd1 is compatible with the 24c128. As the schema requires a fallback compatible to the corresponding Atmel compatible, 'atmel,24c128' is added as a fallback. Signed-off-by:
Bartosz Golaszewski <brgl@bgdev.pl> Link: https://lore.kernel.org/r/20220426175938.2262966-1-robh@kernel.org
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- 02 May, 2022 3 commits
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David Collins authored
Make all interrupt related properties as optional instead of required. Some boards do not required PMIC IRQ support and it isn't needed to handle SPMI bus transactions, so specify it as optional. Signed-off-by:
David Collins <collinsd@codeaurora.org> Signed-off-by:
Fenglin Wu <quic_fenglinw@quicinc.com> Signed-off-by:
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David Heidelberg authored
Convert Qualcomm PMIC SPMI binding to yaml format. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
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Dave Gerlach authored
Document that the firmware-name property can be used to indicate a file contains I2C sequences for PMIC voltage scaling during deep sleep. Based on previous work by Russ Dill. Signed-off-by:
Dave Gerlach <d-gerlach@ti.com> Signed-off-by:
Keerthy <j-keerthy@ti.com> [dfustini: split from driver patch and convert to json-schema] Signed-off-by:
Drew Fustini <dfustini@baylibre.com> Signed-off-by:
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- 28 Apr, 2022 2 commits
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Michael Walle authored
Convert the fsl,layerscape-scfg binding to the new YAML format. In the device trees, the device node always have a "syscon" compatible, which wasn't mentioned in the previous binding. Also added, compared to the original binding, is the interrupt-controller subnode as used in arch/arm/boot/dts/ls1021a.dtsi as well as the litte-endian and big-endian properties. Signed-off-by:
Michael Walle <michael@walle.cc> Reviewed-by:
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Michael Walle authored
Convert the fsl,ls-extirq binding to the new YAML format. In contrast to the original binding documentation, there are three compatibles which are used in their corresponding device trees which have a specific compatible and the (already documented) fallback compatible: - "fsl,ls1046a-extirq", "fsl,ls1043a-extirq" - "fsl,ls2080a-extirq", "fsl,ls1088a-extirq" - "fsl,lx2160a-extirq", "fsl,ls1088a-extirq" Depending on the number of the number of the external IRQs which is usually 12 except for the LS1021A where there are only 6, the interrupt-map-mask was reduced from 0xffffffff to 0xf and 0x7 respectively and the number of interrupt-map entries have to match. Signed-off-by:
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