- 23 Aug, 2016 1 commit
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Sergei Shtylyov authored
Define the Blanche board dependent part of the SDHI0 (connected to the micro-SD slot) device node along with the necessary voltage regulator. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 22 Aug, 2016 1 commit
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Sergei Shtylyov authored
Add support for the general purpose software switches SW2 and tactile switches SW24/25 as a virtual keyboard (like it was done with the Lager/ Koelsch boards). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 17 Aug, 2016 5 commits
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Geert Uytterhoeven authored
As of commit 5aa2eb3c ("[media] v4l: vsp1: Configure device based on IP version"), the DT properties to identify the exact VSP device instance features are no longer used. Hence remove them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Geert Uytterhoeven authored
As of commit 5aa2eb3c ("[media] v4l: vsp1: Configure device based on IP version"), the DT properties to identify the exact VSP device instance features are no longer used. Hence remove them. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
Define the Alt board dependent part of the MMCIF device node. Like the Silk the board has eMMC chip along with the necessary voltage regulator (note that the Vcc/Vccq regulator is dummy -- it's required by the MMCIF driver but doesn't actually exist on the board). Based on work for the Silk board by Vladimir Barinov and Sergei Shtylyov. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Simon Horman authored
Define the Alt board dependent part of the SDHI0 and 1 device nodes along with the necessary voltage regulators. Based on work by the original patch by Vladimir Barinov and Sergei Shtylyov for the Silk board. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe two instances (VSPS and VSPD0) of the VSP1 in the R8A7794 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 09 Aug, 2016 15 commits
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Sergei Shtylyov authored
Define the generic R8A7792 part of the DU device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the DU0/1 clocks and their parent, ZX clock in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Commit 2a0900655d5e (ARM: dts: r8a7792: add I2C support) had a wrongly indented line at the end of the "aliases" subnode -- fix it. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the SILK board dependent part of the R8A7794 sound device node. Add device node for Asahi Kasei AK4643 stereo codec to the I2C1 bus. Add the "simple-audio-card" device node to interconnect the SoC sound device and the codec. This patch is based on the commit 493b4da7 ("ARM: dts: porter: add sound support"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7794 part of the sound device node. This sound device is a complex one and comprises the Audio Clock Generator (ADG), Sampling Rate Converter Unit (SCU), Serial Sound Interface [Unit] (SSI[U]), and Audio DMAC-Peripheral-Peripheral. It is up to the board file to enable the device. This patch is based on the R8A7791 sound work by Kuninori Morimoto. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe Audio-DMAC in the R8A7794 device tree. This patch is loosely based on the commit 8994fff6 ("ARM: shmobile: r8a7791: Add Audio DMAC devices to DT"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add MSTP10 clocks to the R8A7794 device tree. This patch is based on the commit ee914152 ("ARM: shmobile: r8a7791: add MSTP10 support on DTSI"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add some MSTP5 clocks to the R8A7794 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the external audio clocks (signals AUDIO_CLK[ABC]) required by the sound driver. Boards that provide audio clocks need to override the clock frequencies. This patch is based on the commit 0d3dbde8 ("ARM: shmobile: r8a7791: add audio clock on DTSI"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 parts of the VIN[0-5] device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the VIN[0-5] clocks and their parent, ZG clock in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 parts of the I2C[0-5] device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the I2C[0-5] clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 part of the SDHI0 device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the SDHI0 clock and its parent, SD clock in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- 08 Aug, 2016 12 commits
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Simon Horman authored
r8a7794 SDHI ch0 has SD_DMACR which is located in 0x324. This patch updates register size Based on work for the r8a7790 by Kuninori Morimoto. Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
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Sergei Shtylyov authored
Define the Blanche board dependent part of the CAN0 device node along with the CAN_CLK crystal. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 parts of the CAN0/1 device nodes. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
The R-Car CAN controllers can derive the CAN bus clock not only from their peripheral clock input (clkp1) but also from the other internal clock (clkp2) and the external clock fed on the CAN_CLK pin. Describe those clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 part of the EtherAVB device node. Based on the commit 89aac8af ("ARM: dts: r8a7794: add EtherAVB support"). Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add the EtherAVB clock and its parent, HP clock to the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe all 12 GPIO controllers in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Describe the GPIO clocks in the R8A7792 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add the (previously omitted) pin data for the SMSC LAN89218 Ethernet chip to the Blanche board's device tree: the chip's IRQ output is connected to the SoC's IRQ0 pin and its nCS input is connected to the SoC's EX_CS0# pin. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Add the (previously omitted) SCIF0/3 pin data to the Blanche board's device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Sergei Shtylyov authored
Define the generic R8A7792 part of the PFC device node. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Linus Torvalds authored
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- 07 Aug, 2016 6 commits
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git://git.kernel.dk/linux-blockLinus Torvalds authored
Pull more block fixes from Jens Axboe: "As mentioned in the pull the other day, a few more fixes for this round, all related to the bio op changes in this series. Two fixes, and then a cleanup, renaming bio->bi_rw to bio->bi_opf. I wanted to do that change right after or right before -rc1, so that risk of conflict was reduced. I just rebased the series on top of current master, and no new ->bi_rw usage has snuck in" * 'for-linus' of git://git.kernel.dk/linux-block: block: rename bio bi_rw to bi_opf target: iblock_execute_sync_cache() should use bio_set_op_attrs() mm: make __swap_writepage() use bio_set_op_attrs() block/mm: make bdev_ops->rw_page() take a bool for read/write
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git://people.freedesktop.org/~airlied/linuxLinus Torvalds authored
Pull drm zpos property support from Dave Airlie: "This tree was waiting on some media stuff I hadn't had time to get a stable branchpoint off, so I just waited until it was all in your tree first. It's been around a bit on the list and shouldn't affect anything outside adding the generic API and moving some ARM drivers to using it" * tag 'drm-for-v4.8-zpos' of git://people.freedesktop.org/~airlied/linux: drm: rcar: use generic code for managing zpos plane property drm/exynos: use generic code for managing zpos plane property drm: sti: use generic zpos for plane drm: add generic zpos property
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Jens Axboe authored
Since commit 63a4cc24, bio->bi_rw contains flags in the lower portion and the op code in the higher portions. This means that old code that relies on manually setting bi_rw is most likely going to be broken. Instead of letting that brokeness linger, rename the member, to force old and out-of-tree code to break at compile time instead of at runtime. No intended functional changes in this commit. Signed-off-by: Jens Axboe <axboe@fb.com>
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Jens Axboe authored
The original commit missed this function, it needs to mark it a write flush. Cc: Mike Christie <mchristi@redhat.com> Fixes: e742fc32 ("target: use bio op accessors") Signed-off-by: Jens Axboe <axboe@fb.com>
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Jens Axboe authored
Cleaner than manipulating bio->bi_rw flags directly. Signed-off-by: Jens Axboe <axboe@fb.com>
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Jens Axboe authored
Commit abf54548 changed it from an 'rw' flags type to the newer ops based interface, but now we're effectively leaking some bdev internals to the rest of the kernel. Since we only care about whether it's a read or a write at that level, just pass in a bool 'is_write' parameter instead. Then we can also move op_is_write() and friends back under CONFIG_BLOCK protection. Reviewed-by: Mike Christie <mchristi@redhat.com> Signed-off-by: Jens Axboe <axboe@fb.com>
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