- 03 Jan, 2024 13 commits
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Wayne Lin authored
link_rate sometime will be changed when DP MST connector hotplug, so pbn_div also need be updated; otherwise, it will mismatch with link_rate, causes no output in external monitor. Cc: stable@vger.kernel.org Tested-by:
Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by:
Jerry Zuo <jerry.zuo@amd.com> Acked-by:
Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by:
Wade Wang <wade.wang@hp.com> Signed-off-by:
Wayne Lin <wayne.lin@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Camille Cho authored
[Why] BL1_PWM_USER_LEVEL is meant for the user brightness level setting from OS. However, we update it along with other ABM levels to the real PWM value which could be ABMed. [How] Driver to cache and restore the user brightness level setting so that DMUB can retrieve the last user setting in ABM config initialization. Tested-by:
Anthony Koo <anthony.koo@amd.com> Acked-by:
Camille Cho <camille.cho@amd.com> Signed-off-by:
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Meenakshikumar Somasundaram authored
[Why] Fix minor issues in BW Allocation Phase2. [How] - In set_usb4_req_bw_req(), link->dpia_bw_alloc_config.response_ready flag should be reset before writing DPCD REQUEST_BW. - Fix the granularity for value of 2 in get_bw_granularity(). - Removed bandwidth allocation support display fw boot option as the fw would read feature enable status from bios. - Clean up DPIA_EST_BW_CHANGED and DPIA_BW_REQ_SUCCESS cases in dpia_handle_bw_alloc_response(). - Removed allocate_usb4_bw and deallocate_usb4_bw. - Optimized loop in get_lowest_dpia_index(). - Updated link_dp_dpia_allocate_usb4_bandwidth_for_stream() and set_usb4_req_bw_req() to always issue request bw. Tested-by:
PeiChen Huang <peichen.huang@amd.com> Acked-by:
Meenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com> Signed-off-by:
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Josip Pavic authored
[Why] Some functions whose output is typically checked for null are not being checked for null at several call sites, causing some static analysis tools to throw an error. [How] Add null pointer guards around functions that typically have them at other call sites. Tested-by:
Sung Lee <sung.lee@amd.com> Reviewed-by:
Aric Cyr <aric.cyr@amd.com> Acked-by:
Josip Pavic <josip.pavic@amd.com> Signed-off-by:
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Leo (Hanghong) Ma authored
[Why] Certain HDMI modes failed at dml cap check for uncompressed video but they can still be supported for compressed video. [How] Add HDMI capacity computations using fixed31_32 in dc side. Tested-by:
Chris Park <chris.park@amd.com> Acked-by:
Leo (Hanghong) Ma <hanghong.ma@amd.com> Signed-off-by:
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Relja Vojvodic authored
[Why] More information is desired for the test tools. [How] Refactored get_subvp_visual_confirm_color and get_mclk_switch_visual_confirm_color to support the new method of storing the p_state type, which was changed so that it could also be saved and output by the DPM log. Ensured that the p_state type is kept updated by looping through the pipes within commit_planes_for_stream. Tested-by:
Alvin Lee <alvin.lee2@amd.com> Signed-off-by:
Relja Vojvodic <relja.vojvodic@amd.com> Signed-off-by:
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Alvin Lee authored
In DCN32/321 FPO uses per-pipe P-State force. If there is no plane, then then HUBP is power gated, in which case any programming in HUBP has no effect and the pipe is always asserting P-State allow. This is contrary to what we want to happen for FPO (FW should moderate the P-State assertion), so block FPO if there's no plane for the FPO pipe. Tested-by:
Samson Tam <samson.tam@amd.com> Reviewed-by:
Chaitanya Dhere <chaitanya.dhere@amd.com> Signed-off-by:
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Alvin Lee authored
[Why] There is some logic error where the wrong variable was used to check for OTG_MASTER and DPP_PIPE. [How] Add booleans to confirm that the expected pipes were found before validating schedulability. Tested-by:
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Stanley.Yang authored
The ecc_irq is disabled while GPU mode2 reset suspending process, but not be enabled during GPU mode2 reset resume process. Changed from V1: only do sdma/gfx ras_late_init in aldebaran_mode2_restore_ip delete amdgpu_ras_late_resume function Changed from V2: check umc ras supported before put ecc_irq Signed-off-by:
Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
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Roman Li authored
[Why] Idle power optimization was disabled on dcn35 by default. [How] Enable by setting disable_idle_power_optimizations to false. Signed-off-by:
Roman Li <roman.li@amd.com> Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by:
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Roman Li authored
[Why] Instability is observed on DCN35 if idle power optimization is enabled. [How] Disable IPS until issue is resolved. Signed-off-by:
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Mangesh Gadre authored
SMN address is larger than 32 bits for registers on different AID's Updating existing interface to support access to such registers. Signed-off-by:
Mangesh Gadre <Mangesh.Gadre@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Asad Kamal <asad.kamal@amd.com> Signed-off-by:
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Colin Ian King authored
Variable remainder is being initialized with a value that is never read, the assignment is redundant and can be removed. Also add a newline after the declaration to clean up the coding style. Signed-off-by:
Colin Ian King <colin.i.king@gmail.com> Signed-off-by:
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- 19 Dec, 2023 27 commits
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ZhenGuo Yin authored
Idle bo's PTE needs to be re-created when resetting VM state machine. Set idle bo's vm_bo as moved to mark it as invalid. Fixes: 55bf196f ("drm/amdgpu: reset VM when an error is detected") Signed-off-by:
ZhenGuo Yin <zhenguo.yin@amd.com> Reviewed-by:
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YiPeng Chai authored
Add umc page retirement for umc v12_0. V2: 1. Changed umc page retirement check condition to call umc_v12_0_is_uncorrectable_error. 2. Use memset to clear the contents of the umc error address structure. Signed-off-by:YiPeng Chai <YiPeng.Chai@amd.com> Reviewed-by:
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YiPeng Chai authored
smu v13_0_6 supports ecc info by default. Signed-off-by:
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YiPeng Chai authored
Add poison mode check error condition for umc v12_0. Signed-off-by:
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YiPeng Chai authored
MCA supports recording umc address information. V2: Move err_addr variable from struct ras_err_node to struct ras_err_info. Signed-off-by:
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Aric Cyr authored
This DC patchset brings improvements in multiple areas. In summary, we highlight: - change static screen wait frame_count for ips - Fix hang/underflow when transitioning to ODM4:1 - Only clear symclk otg flag for HDMI - Fix lightup regression with DP2 single display configs - Refactor phantom resource allocation - Refactor dc_state interface - Wake DMCUB before executing GPINT commands - Wake DMCUB before sending a command - Refactor DMCUB enter/exit idle interface - enable dcn35 idle power optimization - fix usb-c connector_type - add debug option for ExtendedVBlank DLG adjust - Set test_pattern_changed update flag on pipe enable - dereference variable before checking for zero - get dprefclk ss info from integration info table - skip error logging when DMUB is inactive from S3 - make flip_timestamp_in_us a 64-bit variable - Add case for dcn35 to support usb4 dmub hpd event - Add function for dumping clk registers - Unify optimize_required flags and VRR adjustments - Revert using channel_width as 2 for vram table 3.0 - remove HPO PG in driver side - do not send commands to DMUB if DMUB is inactive from S3 Acked-by:
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Anthony Koo authored
- Remove unused dmub_fw_boot_options flag Acked-by:
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Allen Pan authored
[Why] the original wait for 2 static frames before enter static screen was not good enough for IPS-enabled case since enter/exit takes more time. [How] Changed logic for hardcoded wait frame values. Reviewed-by:
Charlene Liu <charlene.liu@amd.com> Acked-by:
Allen Pan <allen.pan@amd.com> Tested-by:
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Ilya Bakoulin authored
[Why] Under some circumstances, disabling an OPTC and attempting to reclaim its OPP(s) for a different OPTC could cause a hang/underflow due to OPPs not being properly disconnected from the disabled OPTC. [How] Ensure that all OPPs are unassigned from an OPTC when it gets disabled. Reviewed-by:
Ilya Bakoulin <ilya.bakoulin@amd.com> Tested-by:
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Alvin Lee authored
[Description] There is a corner case where the symclk otg flag is cleared when disabling the phantom pipe for subvp (because the phantom and main pipe share the same link). This is undesired because we need the maintain the correct symclk otg flag state for the main pipe. For now only clear the flag only for HDMI signal type, since it's only set for HDMI signal type (phantom is virtual). The ideal solution is to not clear it if the stream is phantom but currently there's a bug that doesn't allow us to do this. Once this issue is fixed the proper fix can be implemented. Reviewed-by:
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Michael Strauss authored
[WHY] Previous fix for multiple displays downstream of DP2 MST hub caused regression [HOW] Match sink IDs instead of sink struct addresses Reviewed-by:
Michael Strauss <michael.strauss@amd.com> Tested-by:
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Dillon Varone authored
[WHY&HOW] dml2_context should be deep copied from src to dst dc_state. Reviewed-by:
George Shen <george.shen@amd.com> Acked-by:
Dillon Varone <dillon.varone@amd.com> Tested-by:
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Dillon Varone authored
[WHY&HOW] After refactoring dc_state, it is always constructed at the time of its creation. Construction can only happen after dc resources are initialized, so move creation to be after this. Reviewed-by:
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Dillon Varone authored
[WHY&HOW] Need to provide valid pointer to dc_state when getting subvp pipe type. Reviewed-by:
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Dillon Varone authored
[WHY?] Phantom streams and planes were previously not referenced explcitly on creation. [HOW?] To reduce memory management complexity, add an additional phantom streams and planes reference into dc_state, and move mall_stream_config to stream_status inside the state to make it safe to modify in shallow copies. Also consildates any logic that is affected by this change to dc_state. Reviewed-by:
Jun Lei <jun.lei@amd.com> Acked-by:
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Dillon Varone authored
[WHY?] Part of the dc_state interface that deals with adding streams and planes should remain public, while others that deal with internal status' and subvp should be private to DC. [HOW?] Move and rename the public functions to dc_state.h and private functions to dc_state_priv.h. Also add some additional functions for extracting subvp meta data from the state. Reviewed-by:
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Nicholas Kazlauskas authored
[Why] DMCUB can be in idle when we attempt to interface with the HW through the GPINT mailbox resulting in a system hang. [How] Add dc_wake_and_execute_gpint() to wrap the wake, execute, sleep sequence. If the GPINT executes successfully then DMCUB will be put back into sleep after the optional response is returned. It functions similar to the inbox command interface. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
Hansen Dsouza <hansen.dsouza@amd.com> Acked-by:
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Nicholas Kazlauskas authored
[Why] We can hang in place trying to send commands when the DMCUB isn't powered on. [How] For functions that execute within a DC context or DC lock we can wrap the direct calls to dm_execute_dmub_cmd/list with code that exits idle power optimizations and reallows once we're done with the command submission on success. For DM direct submissions the DM will need to manage the enter/exit sequencing manually. We cannot invoke a DMCUB command directly within the DM execution helper or we can deadlock. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
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Nicholas Kazlauskas authored
[Why] We can hang in place trying to send commands when the DMCUB isn't powered on. [How] We need to exit out of the idle state prior to sending a command, but the process that performs the exit also invokes a command itself. Fixing this issue involves the following: 1. Using a software state to track whether or not we need to start the process to exit idle or notify idle. It's possible for the hardware to have exited an idle state without driver knowledge, but entering one is always restricted to a driver allow - which makes the SW state vs HW state mismatch issue purely one of optimization, which should seldomly be hit, if at all. 2. Refactor any instances of exit/notify idle to use a single wrapper that maintains this SW state. This works simialr to dc_allow_idle_optimizations, but works at the DMCUB level and makes sure the state is marked prior to any notify/exit idle so we don't enter an infinite loop. 3. Make sure we exit out of idle prior to sending any commands or waiting for DMCUB idle. This patch takes care of 1/2. A future patch will take care of wrapping DMCUB command submission with calls to this new interface. Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by:
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Allen Pan authored
[why] BIOS switches to use USB-C connector type 0x18, but VBIOS's objectInfo table not supported yet. driver needs to patch it based on enc_cap from system integration info table. Reviewed-by:
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Muhammad Ahmed authored
[why & how] Add new option for debug usage Reviewed-by:
Muhammad Ahmed <ahmed.ahmed@amd.com> Tested-by:
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George Shen authored
[Why] In certain cases, ODM pipe split can occur while stream already has test pattern enabled. The new pipe used in the ODM combine config must be configured to output the test pattern in this case. [How] If the stream is configured to output test pattern, then set the test_pattern_changed update flag for the new pipe when it gets enabled. Reviewed-by:
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Josip Pavic authored
[Why] Driver incorrectly checks if pointer variable OutBpp is null instead of if the value being pointed to is zero. [How] Dereference OutBpp before checking for a value of zero. Reviewed-by:
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Charlene Liu authored
[why & how] we have two SSC_En: we get ssc_info from dce_info for MPLL_SSC_EN. we used to call VBIOS cmdtbl's smu_info's SS persentage for DPRECLK SS info, is used for DP AUDIO and VBIOS' smu_info table was from systemIntegrationInfoTable. since dcn35 VBIOS removed smu_info, driver need to use integrationInfotable directly. Reviewed-by:
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Samson Tam authored
[Why] On resume from S3, while DMUB is inactive, DMUB queue and execute calls will not work. Skip reporting errors in these scenarios [How] Add new return code during DMUB queue and execute calls when DMUB is in S3 state. Skip logging errors in these scenarios Reviewed-by:
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Xiaogang Chen authored
SVM uses hmm page walk to valid buffer before map to gpu vm. After have partial migration/mapping do validation on same vm range as migration/map do instead of whole svm range that can be very large. This change is expected to improve svm code performance. Signed-off-by:
Xiaogang Chen <xiaogang.chen@amd.com> Reviewed-by:
Philip Yang <philip.yang@amd.com> Signed-off-by:
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Mario Limonciello authored
It is reported that on a Topaz dGPU the kernel emits: amdgpu: can't get the mac of 5 This is because there is no definition for max levels of VDDGFX declared for SMU71 or SMU7. The correct definition is VDDC so use this. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3049Reviewed-by:
Mario Limonciello <mario.limonciello@amd.com> Signed-off-by:
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