Merge tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt

Merge "Keystone DTS update for 3.17" from Santosh Shilimkar:

Keystone DTS update for 3.17
 - Ethernet clock tree fix.
 - MDIO device tree node. Respective driver update is already queued.
 - Ethernet phy node. Respective driver update is already queued.

* tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone-evm: add 1g ethernet phys nodes
  ARM: dts: keystone: add mdio devices entries
  ARM: dts: keystone: fix netcp's clocks definitions
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Merge "omap dts changes for v3.17 merge window, part1" from Tony Lindgren:

First set of .dts changes for omaps for v3.17 merge window:

- Enable irqchip crossbar interrupt mapping. These changes
  are based on an immutable irqchip branch set up by Jason
  Cooper to make it easier to merge the related .dts changes.

- Removal of omap2 related static clock data that now comes
  from device tree.

- Enabling of PHY regulators for various omaps

- Enabling of PCIe for dra7

- Add support for am437x starterkit

- Enable audio for for omap5

- Enable display and am335x-evmsk

* tag 'omap-for-v3.17/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (43 commits)
  ARM: DTS: omap5-uevm: Enable basic audio (McPDM <-> twl6040)
  ARM: DTS: omap5-uevm: Add node for twl6040 audio codec
  ARM: DTS: omap5-uevm: Enable palmas clk32kgaudio clock
  ARM: dts: dra7: Add dt data for PCIe controller
  ARM: dts: dra7: Add dt data for PCIe PHY
  ARM: dts: dra7: Add dt data for PCIe PHY control module
  ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe PHY instance
  ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance
  ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY
  ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
  ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock
  ARM: dts: dra7-evm: Add regulator information to USB2 PHYs
  ARM: omap2plus_defconfig: enable TPS65218 configs
  ARM: dts: AM437x: Add TPS65218 device tree nodes
  ARM: dts: AM437x: Fix i2c nodes indentation
  ARM: dts: AM43x: Add TPS65218 device tree nodes
  ARM: dts: Add devicetree for Gumstix Pepper board
  ARM: dts: dra7: add crossbar device binding
  ARM: dts: dra7: add routable-irqs property for gic node
  ARM: OMAP24xx: clock: remove legacy clock data
  ...
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-dt3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Third Round of Renesas ARM Based SoC DT Updates for v3.17" from Simon
Horman:

* Initialise SCI using DT when booting the kzm9g, armadillo800eva,
  ape6evm and bockw boards without legacy-C code.

* tag 'renesas-dt3-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (24 commits)
  ARM: shmobile: kzm9g-reference: Initialise SCIF device using DT
  ARM: shmobile: sh73a0: Add SCIF nodes
  ARM: shmobile: armadillo800eva-reference: Initialise SCIF device using DT
  ARM: shmobile: r8a7740: Add SCIF nodes
  ARM: shmobile: ape6evm-reference: Initialise SCIF device using DT
  ARM: shmobile: r8a73a4: Add SCIF nodes
  ARM: shmobile: bockw-reference: Initialise SCIF device using DT
  ARM: shmobile: r8a7778: Add SCIF nodes
  ARM: shmobile: sh73a0: add SCI clock support for DT
  ARM: shmobile: r8a7740: correct SCI clock support for DT
  ARM: shmobile: r8a73a4: add SCI clock support for DT
  ARM: shmobile: r8a7778: add SCI clock support for DT
  ARM: shmobile: r8a7790: lager: use iic cores instead of i2c
  ARM: shmobile: Lager: Correct I2C bus for VDD MPU regulator
  ARM: shmobile: kzm9g-reference: Remove early_printk from command line
  ARM: shmobile: armadillo800eva-reference: Remove early_printk from command line
  ARM: shmobile: r8a7779: Consistently use tabs for indentation
  ARM: shmobile: henninger: Consistently use tabs for indentation
  ARM: shmobile: henninger: enable internal PCI
  ARM: shmobile: koelsch: enable internal PCI
  ...
Signed-off-by: Olof Johansson <olof@lixom.net>

Keystone EVMK2HX has two 1G Marvell 88E1111 Ethernet PHYs
installed, so add corresponding child nodes for 1G MDIO bus
and enable it.

For more information see schematics:
 http://wfcache.advantech.com/www/support/TI-EVM/download/Schematics/PDF/K2H_K2EVM-HK_SCH_A102_Rev1_0.pdfSigned-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

The Keystone 2 has MDIO HW block which are compatible
to Davinci SoCs:
See "Gigabit Ethernet (GbE) Switch Subsystem"
  See http://www.ti.com/lit/ug/sprugv9d/sprugv9d.pdf

Hence, add corresponding DT entry for Keystone 2.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

The board uses twl6040 codec connected via McPDM link. McBSP1 and McBSP2 can
be used for FM/BT.
At the same time move the pinctrl handling to the correct place - under the
corresponding nodes.
Audio connectors on the board:
Headset in/out
Stereo Line out
Stereo Line in.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The board uses twl6040 as audio codec. Move the corresponding  pinctrl as
well under the node.
twl6040 needs 32k clock from palams.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

clk32kg-audio clock is needed for twl6040 codec.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Added dt data for PCIe controller. This node contains dt data for
both the DRA7 part of designware controller and for the designware core.
The documention for this node can be found @ ../bindings/pci/ti-pci.txt.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Added dt data for PCIe PHY as a child node of ocp2scp3.
The documention for this node can be found @ ../bindings/phy/ti-phy.txt.
26.3.3 PCIe Shared PHY Subsystem Integration in vE of DRA7xx ES1.0
describes the PCIe PHY subsystem-related components integrated in the device.

Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Added dt data for PCIe PHY control module used by PCIe PHY.
The documention for this node can be found @ ../bindings/phy/ti-phy.txt

Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Added missing clocks used by second instance of PCIe PHY.
The documention for this nodes can be found @ ../bindings/clock/ti/gate.txt.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

There are two instances of PCIe PHY in DRA7xx. So renamed
optfclk_pciephy_32khz, optfclk_pciephy_clk and optfclk_pciephy_div_clk to
optfclk_pciephy1_32khz, optfclk_pciephy1_clk and optfclk_pciephy1_div_clk
respectively. This is needed for adding the clocks for second PCIe PHY
instance.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Added missing 32KHz clock used by PCIe PHY.
Figure 26-19. PCIe PHY Subsystem Integration in vE of DRA7xx ES1.0 TRM shows
32KHz is used by PCIe PHY.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck
from dpll_pcie_ref_ck.

Figure 26-22. DPLL_PCIE_REF Functional Block Diagram in vE of DRA7xx ES1.0 TRM
shows the signal name for the output of post divider (M2) is CLKOUTLDO.

Figure 26-21. PCIe PHY Clock Generator Overview shows CLKOUTLDO is used as
input to apll mux.

So the actual output of dpll is dpll_pcie_ref_m2ldo_ck which is also the input
of apll.

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Add divider table to optfclk_pciephy_div clock. The 8th bit of
CM_CLKMODE_APLL_PCIE can be programmed to either 0x0 or 0x1
based on if the divider value is 0x2 or 0x1.

Figure 26-21. PCIe PHY Clock Generator Overview in vE of DRA7xx ES1.0 shows the
block diagram of Clock Generator Subsystem of PCIe PHY module. The divider
value if '1' should be programmed in order to get the correct
PCIE_PHY_DIV_GCLK frequency (2.5GHz).

Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

add #reset-cells to socfpga.dtsi. This was missing from the
latest updates and caused the socfpga reset controller to fail
to load like so:

ffd05000.rstmgr: /soc/rstmgr@ffd05000 missing #reset-cells property
probe of ffd05000.rstmgr failed with error -22
Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'ux500-devicetree-v3.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt

Merge "Ux500 devicetree changes for v3.17" from Linus Walleij:

Ux500 device tree patches for v3.17:
- Add regulators to STMPE expanders
- Add proper DMA channels for all SD/MMC blocks
- Add sensors to the device tree

* tag 'ux500-devicetree-v3.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
  ARM: ux500: add misc sensors to the device trees
  ARM: ux500: add some DB8500 DMA channel info
  ARM: ux500: add VCC and VIO regulators to STMPE IC
  + Linux 3.16-rc4
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge "at91: dt for 3.17 #1" from Nicolas Ferre:

First DT update for 3.17:
- move of crystals DT definitions to the /clocks node
- addition of clock entries for sound for CCF enabled platforms
- addition of DMA and DMA + nand on at91sam9rl
- move to CCF for all not-converted-yet AT91 SoCs: at91rm9200, at91sam9260/9g20,
  at91sam9g45 family and at91sam9263

* tag 'at91-dt' of git://github.com/at91linux/linux-at91: (43 commits)
  ARM: at91/dt: usb_a9263: define crystals frequencies
  ARM: at91/dt: tny_a9263: define crystals frequencies
  ARM: at91/dt: sam9263ek: define crystals frequencies
  ARM: at91: move at91sam9263 SoC to the CCF
  ARM: at91/dt: sam9263: define clocks
  ARM: at91: prepare common clk transition for sam9263
  ARM: at91/dt: cosino define crystals frequencies
  ARM: at91/dt: pm9g45: crystals frequencies
  ARM: at91/dt: sam9m10g45ek: define crystals frequencies
  ARM: at91: move at91sam9g45 SoC to the CCF
  ARM: at91/dt: sam9g45: define clocks
  ARM: at91: prepare common clk transition for sam9g45
  ARM: at91/dt: kizbox: define main crystal frequency
  ARM: at91/dt: animeo_ip: define crystals frequencies
  ARM: at91/dt: ethernut5: define crystals frequencies
  ARM: at91/dt: evk-pro3: define slow crytal frequency
  ARM: at91/dt: aks-cdu: define slow crytal frequency
  ARM: at91/dt: ge863-pro3: define main crystal frequency
  ARM: at91/dt: mpa1600: define crytals frequencies
  ARM: at91/dt: qil_a9260: define crystals frequencies
  ...
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'renesas-dt2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Second Round of Renesas ARM Based SoC DT Updates for v3.17" from Simon
Horman:

- Extend hardware coverage
  * Add DVC support for sound nodes on r8a7791 and r8a7790
  * Enable internal PCI on r8a7790/lager

* tag 'renesas-dt2-for-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7791: add DVC support for sound node on DTSI
  ARM: shmobile: r8a7790: add DVC support for sound node on DTSI
  ARM: shmobile: lager: enable internal PCI
  ARM: shmobile: r8a7790: add internal PCI bridge nodes
Signed-off-by: Olof Johansson <olof@lixom.net>

Initialise SCIF device using DT when booting armadillo800eva
using DT reference.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This describes all of the SCIF hardware of the sh73a0.
Each node is disabled and may be enabled as necessary
by board DTS files.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Initialise SCIF device using DT when booting armadillo800eva
using DT reference.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This describes all of the SCIF hardware of the r8a7740.
Each node is disabled and may be enabled as necessary
by board DTS files.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Initialise SCIF device using DT when booting ape6evm
using DT reference.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This describes all of the SCIF hardware of the r8a73a4.
Each node is disabled and may be enabled as necessary
by board DTS files.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Initialise SCIF device using DT when booting bockw
using DT reference.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This describes all of the SCIF hardware of the r8a7778.
Each node is disabled and may be enabled as necessary
by board DTS files.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This will be used when initialising SCI devices using DT
until common clock framework support is added.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

When initialising SCI devices their names will be .serial
not .sci.

This will be used when initialising SCI devices using DT
until common clock framework support is added.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This will be used when initialising SCI devices using DT
until common clock framework support is added.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

This will be used when initialising SCI devices using DT
until common clock framework support is added.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

On Lager board, i2c and iic cores can be interchanged since they can be
muxed to the same wires. Commit e489c2a9
("ARM: shmobile: lager: enable i2c devices") activated the i2c cores,
yet the iic cores should be default since they have the more interesting
features for generic use cases, i.e. SMBUS_QUICK and DMA (yet to be
supported).
Reported-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

I2C bus for VDD MPU regulator is IIC3, not I2C3.
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Reviewed-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Pull "CCF migration for 3.17" from Alexandre Belloni:
"This is the switch to CCF for all the remaining at91 SoCs and boards"

Define Calao USB-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Define Calao TNY-A9263 main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

Define at91sam9263ek main and slow crystals frequencies.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>

This patch removes the selection of AT91_USE_OLD_CLK when selecting
at91sam9263 SoC support. This will automatically enable COMMON_CLK_AT91
option and add support for at91 common clock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>