1. 29 Apr, 2024 11 commits
  2. 25 Apr, 2024 5 commits
  3. 22 Apr, 2024 3 commits
  4. 12 Apr, 2024 7 commits
  5. 11 Apr, 2024 5 commits
  6. 10 Apr, 2024 6 commits
  7. 09 Apr, 2024 3 commits
    • Linus Torvalds's avatar
      Merge tag 'drm-fixes-2024-04-09' of https://gitlab.freedesktop.org/drm/kernel · 2c71fdf0
      Linus Torvalds authored
      Pull drm nouveau fix from Dave Airlie:
       "A previous fix to nouveau devinit on the GSP paths fixed the Turing
        but broke Ampere, I did some more digging and found the proper fix.
        Sending it early as I want to make sure it makes the next 6.8 stable
        kernels to fix the regression.
      
        Regular fixes will be at end of week as usual.
      
        nouveau:
      
         - regression fix for GSP display enable"
      
      * tag 'drm-fixes-2024-04-09' of https://gitlab.freedesktop.org/drm/kernel:
        nouveau: fix devinit paths to only handle display on GSP.
      2c71fdf0
    • Thorsten Blum's avatar
      compiler.h: Add missing quote in macro comment · d7a62d0a
      Thorsten Blum authored
      Add a missing doublequote in the __is_constexpr() macro comment.
      Signed-off-by: default avatarThorsten Blum <thorsten.blum@toblux.com>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      d7a62d0a
    • Tony Luck's avatar
      x86/mce: Implement recovery for errors in TDX/SEAM non-root mode · 7911f145
      Tony Luck authored
      Machine check SMIs (MSMI) signaled during SEAM operation (typically
      inside TDX guests), on a system with Intel eMCA enabled, might eventually
      be reported to the kernel #MC handler with the saved RIP on the stack
      pointing to the instruction in kernel code after the SEAMCALL instruction
      that entered the SEAM operation. Linux currently says that is a fatal
      error and shuts down.
      
      There is a new bit in IA32_MCG_STATUS that, when set to 1, indicates
      that the machine check didn't originally occur at that saved RIP, but
      during SEAM non-root operation.
      
      Add new entries to the severity table to detect this for both data load
      and instruction fetch that set the severity to "AR" (action required).
      
      Increase the width of the mcgmask/mcgres fields in "struct severity"
      from unsigned char to unsigned short since the new bit is in position 12.
      
      Action required for these errors is just mark the page as poisoned and
      return from the machine check handler.
      
      HW ABI notes:
      =============
      
      The SEAM_NR bit in IA32_MCG_STATUS hasn't yet made it into the Intel
      Software Developers' Manual. But it is described in section 16.5.2
      of "Intel(R) Trust Domain Extensions (Intel(R) TDX) Module Base
      Architecture Specification" downloadable from:
      
        https://cdrdv2.intel.com/v1/dl/getContent/733575
      
      Backport notes:
      ===============
      
      Little value in backporting this patch to stable or LTS kernels as
      this is only relevant with support for TDX, which I assume won't be
      backported. But for anyone taking this to v6.1 or older, you also
      need commit:
      
        a51cbd0d ("x86/mce: Use severity table to handle uncorrected errors in kernel")
      Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
      Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
      Link: https://lore.kernel.org/r/20240408180944.44638-1-tony.luck@intel.com
      7911f145