- 24 Apr, 2022 13 commits
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Ping-Ke Shih authored
Hardware reports PPDU status containing encoded channel index to driver, so we decode it and then fill freq and band. Signed-off-by:
Ping-Ke Shih <pkshih@realtek.com> Signed-off-by:
Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-14-pkshih@realtek.com
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Ping-Ke Shih authored
Read thermal value, and then we can use EWMA thermal value to do RF calibrations if the value is changed over a threshold. Signed-off-by:
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Ping-Ke Shih authored
Three chip_ops are implemented in this patch. The ::set_txpwr_ctrl and ::init_txpwr_unit are called when we up interface and then configure TX power registers to initial values. The ::set_txpwr_ctrl is to configure 'txpwr_ref' to make basic output TX power of OFDM and CCK rate to be the same. The ::init_txpwr_unit is to initialize TSSI (a method to do TX power compensation depends on thermal value) control and bandedge. The ::set_txpwr is called once switching channel. First, it sets TX power for each rate section (e.g. CCK, OFDM), and then sets TX power offset between 1SS and 2SS rate. Finally, it sets TX power limit to prevent power over regulation. Signed-off-by:
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Ping-Ke Shih authored
8852c propose new API to configure BB TX/RX path. Without fix patch, it can't transmit any packet. Signed-off-by:
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Ping-Ke Shih authored
IQK results in hardware has two copies that are used by firmware to switch these two to support MCC. This H2C tell firmware the corresponding channel and band of each IQK results, and currrent one. Signed-off-by:
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Ping-Ke Shih authored
When disconnecting, it warns somethings after power is off, and we can't do HCI IO. So, add this patch to avoid below messages: rtw89_8852ce 0000:03:00.0: timed out to flush pci txch: 11 rtw89_8852ce 0000:03:00.0: failed to pre-release fwcmd Signed-off-by:
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Ping-Ke Shih authored
RPP is to report certain skb(s) can be freed, and TX BD indicates which TX descriptors can be freed. Normally, TX BD is happened before RPP. In low power mode, RPP can happen ahead, so change flow to handle this case. Signed-off-by:
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Ping-Ke Shih authored
In low power mode, we need to pause PCI to configure IMR and PCI ring index registers accordingly, because the regular registers are power-off in this mode. In the transition moment named paused in code, we can't touch ring index, so don't kick off DMA immediately. Instead, queue them into pending queue, and kick off after the moment. There are three low power modes, which are RF off/clock gate/power gate, but PCI enter low power mode in later two modes only. So, add a mask to achieve this. Signed-off-by:
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Ping-Ke Shih authored
Normally, we re-enable interrupt by napi_poll, but for this special situation, we must turn it on immediately because napi_poll isn't scheduled. Signed-off-by:
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Ping-Ke Shih authored
In lower power mode, there are very low amount of RX, and it must process in a separated function instead of schedule_napi(), because the existing napi_poll does many things to optimize performance, but not all registers can access in low power mode. The simple way is to use threadfn to process the simple thing. Signed-off-by:
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Ping-Ke Shih authored
To reclaim TX BD, we need to read hardware reading index to determine if any DMA is complete. Since this IO spends time, do this thing only if we really need it when TX BD has no free buffer corresponding to target skb. The experimental result shows that reading counter decreases from 26,000 to 130 per second. Signed-off-by:
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Ping-Ke Shih authored
RPWM/CPWM are registers that can set and check low power mode. Since chips use different address, add a field to access them in common flow. Signed-off-by:
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Ping-Ke Shih authored
8852CE uses different but similar IMR/ISR registers, and its masks are also different in various states, so add config_intr_mask ops to configure masks according to under_recovery or low_power states. Signed-off-by:
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- 23 Apr, 2022 23 commits
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Po-Hao Huang authored
Disable this capability to avoid timeout errors on certain platforms. Without it, pci bus might stuck and leads to disconnection. Signed-off-by:
Po-Hao Huang <phhuang@realtek.com> Signed-off-by:
Chris Chiu <chris.chiu@canonical.com> Signed-off-by:
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Po-Hao Huang authored
This avoids below warning and makes compiler happy. error: uninitialized symbol 'tim_offset' Signed-off-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
Zeal Robot <zealci@zte.com.cn> Signed-off-by:
Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
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Ping-Ke Shih authored
During setting channel, we need to backup/restore and disable/enable some settings. The settings include SCH (scheduler channel), PPDU status report, and RF components, DFS and ADC. Signed-off-by:
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Ping-Ke Shih authored
BB does many settings during setting channel. First is to configure CCK for 2G channels, and then basic channel and bandwidth settings with a encoded channel index that will report to driver when we receive packets. Configure spur elimination to avoid spur of CSI and NBI tones in certain frequencies. Also, it initializes BT grant to arrange path sharing with BT according to band. Finally, reset TSSI and BB hardware to ensure it stays in initial state. Signed-off-by:
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Ping-Ke Shih authored
Configure channel and bandwidth of MAC registers to work properly. Signed-off-by:
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Ping-Ke Shih authored
Prepare functions to configure channel and bandwidth accordingly. Signed-off-by:
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Ping-Ke Shih authored
HFC is short for HCI flow control, and these parameters is used to configure PCI quota for TX/RX. Signed-off-by:
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Ping-Ke Shih authored
Define efuse struct to access gain offset, and store them for further use by setting channel. Signed-off-by:
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Zong-Zhe Yang authored
Add parser for bb gain table and configure bb gain table for 8852c. While ctrl_ch, obtain bb gain error settings and write them to phy. Signed-off-by:
Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by:
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Ping-Ke Shih authored
chip_ops::bb_sethw is to initialize BB settings out of BB parameters tables. Once switching channel or initialing, we do chip_ops::bb_reset to reset hardware counters and states to make things in expectation. Signed-off-by:
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Ping-Ke Shih authored
TSSI is used to manage TX power with thermal value as a factor. This patch is to configure bandedge to TX proper waveform. Signed-off-by:
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Zong-Zhe Yang authored
TX power track tables are used to do TX power compensation according to thermal value. In order to work in existing and new chip, add new 6G entries, and change type from u8 to s8. Internal version table is HALRF_027_00_031. Signed-off-by:
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Ping-Ke Shih authored
TX power depends on rate, but must follow regulation for specific country. Once asked to set channel, we configure registers according to these TX power tables. Signed-off-by:
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Ping-Ke Shih authored
These parameters are used to initialize BB and RF hardware when we are going to bring up interface and start to transmit and receive. Signed-off-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get() to replace pm_runtime_get_sync and pm_runtime_put_noidle. This change is just to simplify the code, no actual functional changes. Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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Minghao Chi authored
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by:
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- 13 Apr, 2022 4 commits
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Ping-Ke Shih authored
Fix wrong checking statement. Fortunately, this wrong code doesn't affect existing chip. Fixes: 740c431c ("rtw89: pci: add register definition to rtw89_pci_info to generalize pci code") Signed-off-by:
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Ping-Ke Shih authored
Add to configure security CAM while mac80211 calls set_key and del_key. Signed-off-by:
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Ping-Ke Shih authored
DCTL is short for D-MAC control that V1 chip uses this H2C to configure security CAM. Implement the callers in next patch. Signed-off-by:
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Ping-Ke Shih authored
In order to support new chip that has capability of 160M, we need new format to fill new information, so add a new V1 ID for newer use. Since most fields are the same, fill fields according to the function ID of chip. Signed-off-by:
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